Technical Reports
System Design of Digital Camera Using SpecC
A. Gupta and R. Doemer, "System Design of Digital Camera Using SpecC," TR 04-32, December 10, 2004. download pdf
Network Synthesis for SoC
D. Shin, A. Gerstlauer, and D. Gajski, "Network Synthesis for SoC," TR 04-15, June 10, 2004. download pdf
Leakage Aware Dynamic Slack Reclamation in Real-Time
R. Jejurikar and R. Gupta, "Leakage Aware Dynamic Slack Reclamation in Real-Time," TR 04-31, November 2004. download pdf
Systemwide Energy Minimization in Real-Time Embedded Systems
R. Jejurikar and R. Gupta, "Systemwide Energy Minimization in Real-Time Embedded Systems," TR 04-14, May 2004. download pdf
The Phantom Serializing Compiler
A. Nacul and T. Givargis, "The Phantom Serializing Compiler," TR 04-30, November 22, 2004. download pdf
On the Detection of Synchronization Errors
I. G. Harris, "On the Detection of Synchronization Errors," TR 04-13, May 2004. download pdf
System Level Verification with Model Algebra
S. Abdi and D. Gajski, "System Level Verification with Model Algebra," TR 04-29, November 9, 2004. download pdf
NISC Application and Advantages
D. Gajski and M. Reshadi, "NISC Application and Advantages," TR 04-12, May 2004. download pdf
eCACTI: An Enhanced Power Estimation Model for On-chip Caches
M. Mamidipaka and N. Dutt, "eCACTI: An Enhanced Power Estimation Model for On-chip Caches," TR 04-28, September 14, 2004. download pdf
Rapid Exploration of Bus-based Communication Architectures at the CCATB Abstraction
S. Pasricha, N. Dutt, and M. Ben-Romdhane, "Rapid Exploration of Bus-based Communication Architectures at the CCATB Abstraction," TR 04-11, May 2004. download pdf
Floorplan-aware Bus Architecture Synthesis
S. Pasricha, N. Dutt, E. Bozorgzadeh, and M. Ben-Romdhane, "Floorplan-aware Bus Architecture Synthesis," TR 04-27, October 2004. download pdf
Optimized Slowdown in Real-Time Task Systems
R. Jejurikar and R. Gupta, "Optimized Slowdown in Real-Time Task Systems," TR 04-10, April 2004. download pdf
Systematic Power Management of Heterogeneous Real-time Systems by Dynamic Schedule Analysis
B. Gorjiara and N. Bagherzadeh, "Systematic Power Management of Heterogeneous Real-time Systems by Dynamic Schedule Analysis," TR 04-26, August 2004. download pdf
Procrastination Scheduling in Fixed Priority Real-Time Systems
R. Jejurikar and R. Gupta, "Procrastination Scheduling in Fixed Priority Real-Time Systems," TR 04-09, April, 2004. download pdf
System-on-Chip Communication Modeling Style Guide
D. Shin, A. Gerstlauer, R. Doemer, D. Gajski, "System-on-Chip Communication Modeling Style Guide," TR 04-25, July 2004. download pdf
NISC Modeling and Simulation
M. Reshadi and D. Gajski, "NISC Modeling and Simulation," TR 04-08, March 2004. download pdf
System-on-Chip Transaction-Level Modeling Style Guide
D. Shin, L. Cai, A. Gerstlauer, R. Doemer, D. Gajski, "System-on-Chip Transaction-Level Modeling Style Guide," TR 04-24, July 2004. download pdf
A Semantics-Preserving Reduction of Code-Annotated Well-formed Free Choice Petri Nets
N. Savoiu, S. Shukla, and R. Gupta, "A Semantics-Preserving Reduction of Code-Annotated Well-formed Free Choice Petri Nets," TR 04-07, February 12, 2004. download pdf
System-On-Chip Network Modeling Style Guide
D. Shin, J. Peng, A. Gerstlauer, R. Doemer, D. Gajski, "System-On-Chip Network Modeling Style Guide," TR 04-23, July 31, 2004. download pdf
High Level Design Space Exploration of Shared Bus Communication Architectures
S. Pasricha, M. Ben-Romdhane, and N. Dutt, "High Level Design Space Exploration of Shared Bus Communication Architectures," TR 04-06, March 13, 2004. download pdf
System-On-Chip Architecture Modeling Style Guide
J. Peng, A. Gerstlauer, R. Doemer, D. Gajski, "System-On-Chip Architecture Modeling Style Guide," TR 04-22, July 31, 2004. download pdf P. Biswas, S. Banerjee, N. Dutt, L. Pozzi, P. Ienne, "ISEGEN: Adapting Kernighan-Lin Min-Cut Heuristic for Generation...
Functional Coverage Driven Test Generation for Validation of Pipelined Processors
P. Mishra and N. Dutt, "Functional Coverage Driven Test Generation for Validation of Pipelined Processors," TR 04-05, March 12, 2004. download pdf
Automated Synthesis of Bus Architectures for Systems with Throughput Constraints
S. Pasricha, N. Dutt, and M. Ben-Romdhane, " Automated Synthesis of Bus Architectures for Systems with Throughput Constraints," TR 04-20, August 2004. download pdf
Retargetable Profiling for Rapid, Early System-Level Design Space Exploration
L. Cai, A. Gerstlauer, and D. Gajski, "Retargetable Profiling for Rapid, Early System-Level Design Space Exploration," TR 04-04, February 2004. download pdf
Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components
R. Doemer, A. Gerstlauer, D. Shin, "Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components," TR 04-19, July 22, 2004. download pdf
Integrating Processor Slowdown and Preemption Threshold Scheduling for Energy Efficiency in Real Time Embedded Systems
R. Jejurikar and R. Gupta, "Integrating Processor Slowdown and Preemption Threshold Scheduling for Energy Efficiency in Real Time Embedded Systems," TR 04-03, February 16, 2004. download pdf
Leakage Aware Dynamic Voltage Scaling for Real Time Embedded Systems
R. Jejurikar, C. Pereira, and R. Gupta, "Leakage Aware Dynamic Voltage Scaling for Real Time Embedded Systems," TR 03-35, November 30, 2003. download pdf
Automatic Software Generation for System Level Design
H. Yu, R. Doemer, and D. Gajski, "Automatic Software Generation for System Level Design," TR 03-18, May 14, 2003. download pdf
System Design Methodology and Tools
D. D. Gajski, J. Peng, A. Gerstlauer, H. Yu, and D. Shin, "System Design Methodology and Tools," TR 03-02, January 12, 2003. download pdf
Dynamic Voltage and Cache Reconfiguration for Low Power
A. Nacul and T. Givargis, "Dynamic Voltage and Cache Reconfiguration for Low Power," TR 03-34, November 7, 2003. download pdf
A Framework for GUI-driven Design Space Exploration of a MIPS4K-like processor
S. Pasricha, P. Biswas, P. Mishra, A. Shrivastava, A. Mandal, N. Dutt, and A. Nicolau, "A Framework for GUI-driven Design Space Exploration of a MIPS4K-like processor," TR 03-17, April 2003. download pdf
Adaptive Online Cache Reconfiguration for Low Power Systems
T. Givargis and A. Nacul, "Adaptive Online Cache Reconfiguration for Low Power Systems," TR 03-01, April 23, 2003. download pdf
Automatic Generation of Bus Functional Models from Transaction Level Models
D. Shin, S. Abdi, and D. Gajski, "Automatic Generation of Bus Functional Models from Transaction Level Models," TR 03-33, November 18, 2003. download pdf
Greedy and Heuristic-based Algorithms for Synthesis of Complex Instructions in Heterogeneous-Connectivity-based DSPs
P. Biswas and N. Dutt, "Greedy and Heuristic-based Algorithms for Synthesis of Complex Instructions in Heterogeneous-Connectivity-based DSPs," TR 03-16, April 2003. download pdf
Leakage Power Estimation in SRAMs
M. Mamidipaka, K. Khouri, N. Dutt, and M. Abadir, "Leakage Power Estimation in SRAMs," TR 03-32, October 24, 2003. download pdf
Energy Efficient Communication for Reliability and Quality Aware Sensor Networks
C. Pereira, S. Gupta, K. Niyogi, I. Lazaridis, S. Mehrotra, and R. Gupta, "Energy Efficient Communication for Reliability and Quality Aware Sensor Networks," TR 03-15, April 21, 2003. download pdf
System Debugging and Verification: A New Challenge
S. Abdi and D. Gajski, "System Debugging and Verification: A New Challenge," TR 03-31, October 1, 2003 download pdf
Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow
S. Gupta, N. Dutt, R. Gupta, and A. Nicolau, "Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow," TR 03-14, April 2003. download pdf
Communication Abstractions for System-Level Design and Synthesis
A. Gerstlauer, "Communication Abstractions for System-Level Design and Synthesis," TR 03-30, October 24, 2003. download pdf
C to SpecC Conversion Style
D. D. Gajski and K. Ramineni, "C to SpecC Conversion Style," TR 03-13, April 4, 2003. download pdf