Conference Proceedings

Location: Nagasaki, Japan
Web Site: http://euc05.euc-conference.org/

J. Lu, L. Bao and T. Suda, “Coverage aware Sensor Engagement in Dense Sensor Networks,” IFIP International Conference on Embedded and Ubiquitous Computing, December 6-9, 2005. download pdf

Location: San Jose, CA
Web Site: http://www.collaboratecom.org/2005/

R. Egashira, A. Enomoto, T. Suda, H. Sasaki, and H. Iwasaki, “Distributed Service Discovery using Preference,” CollaborateCom 2005, December 19-21, 2005.

Location: Cambridge, MA
Website: http://ics05.csail.mit.edu/

R. Gonzales, A. Cristal, A. Veidenmbaum., and M. Valero, “An Asymmetric Clustered Processor based on Value Content,” ACM International Conference on Supercomputing (ICS 2005), June 2005.

Location: Shanghai, China
Web Site: http://www.aspdac.com/

S. Abdi and D. Gajski, “A Formalism for Functionality Preserving System Level Transformations,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 139-144, January 18-21, 2005 download pdf

Y. Agarwal, C. Schurgers, and R. Gupta, “Dynamic Power Management Using On-Demand Paging for Networked Embedded Systems,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 755-759, January 18-21, 2005 download pdf

R. Ayoub and A. Orailoglu, ” A Unified Transformational Approach for Reductions in Fault Vulnerability, Power, and Crosstalk Noise and Delay on Processor Buses,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 729-734, January 18-21, 2005 download pdf

L. Cai, A. Gerstlauer,  and D. Gajski, “Multi-Metric and Multi-Entity Characterization of Applications for Early System Design Exploration,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 944-947, January 18-21, 2005 download pdf

A. Gerstlauer, D. Shin, R. Doemer, and D. Gajski, “System-Level Communication Modeling for Network-on-Chip Synthesis,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 45-48, January 18-21, 2005 download pdf

S. Pasricha, N. Dutt, and M. Ben-Romdhane, “Automated Throughput-Driven Synthesis of Bus-Based Communication Architectures,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 495-498, January 18-21, 2005 download pdf

J. Peng, S. Abdi, and D. Gajski, “A Clustering Technique to Optimize hardware/Software Synchronization,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 965-968, January 18-21, 2005 download pdf

W. Rao, A. Orailoglu, and R. Karri, “Fault Tolerant Nanoelectronic Processor Architectures,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 311-316, January 18-21, 2005 download pdf

J. Seo and N. Dutt, “A Generalized Technique for Energy-Efficient Operating Voltage Set-Up in Dynamic Voltage Scaled Processors,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 836-841, January 18-21, 2005 download pdf

R. Topaloglu and A. Orailoglu, “Forward Discrete Probability Propagation Method for Device Performance Characterization Under Process Variations,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 220-223, January 18-21, 2005 download pdf

S. Verma, K. Ramineni, and I. Harris, “An Efficient Control-Oriented Coverage Metric,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 317-322, January 18-21, 2005 download pdf
T. Wei, K. Wu, R. Karri, and A. Orailoglu, “Fault Tolerant Quantum Cellular Array (QCA) Design Using Triple Modular Redundancy with Shifted Operands,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 1192-1195, January 18-21, 2005 download pdf

C. Zhang and F. Kurdahi, “On Combining Iteration Space Tiling with Data Space Tiling for Scratch-Pad Memory Systems,” Asia and South Pacific Design Automation Conference (ASP-DAC 2005), Shanghai, China, pp 965-968, January 18-21, 2005 download pdf

Location: Irvine,CA
Website: http://ism2005.eecs.uci.edu/

C-Y. Shih, J.Hu, R. Klefstad, J. Lee, and D. Toulbert, “Marco- A Middleware Architecture for Distributed Multimedia Collaboration,” IEEE International Symposium of Multimedia (ISM 2005), December 12-14 2005.

Location: Columbus, OH
Web Site: http://lia.deis.unibo.it/siumi05/

M.Kim, H. Oh, N.Dutt, A.Nicolau, and N.Venkatasubramanian, “Probability Based Power Aware Error Resilient Coding,”(ICDCS’05) Workshop on Services and Infrastructures for the Ubiquitous and Mobile Internet (SIUMI’05), June 2005.

Location: Goa, India
Web Site: http://www.hipc.org/hipc2005/

W.W Ro and J-L Gaudiot, “A Low-Complexity Issue Queue Design with Speculative

Pre-Execution,” International Conference on High Performance Computing(HiPC 2005), December 18-21, 2005.

Location: Hawthorne, NY
Web Site: http://www.ece.lsu.edu/lcpc2005/

A. Kejariwal, A. Nicolau and C. D. Polychronopoulos, “An Efficient Approach for Self-Scheduling Parallel Loops on Multiprogrammed Parallel Computers,” International Workshop on Languages and Compilers for Parallel Computing (LCPC), October 2005.download pdf

Location: Anaheim, CA
Web Site: http://www.dac.com/

S. Pasricha, N. Dutt, E. Bozorgzadeh, and M. Ben-Romdhane, “Floorplan-aware Automated Synthesis of Bus-based Communication Architectures,” Design and Automation Conference (DAC 2005), June 2005. download pdf

S. Banerjee, E. Bozorgzadeh, N. Dutt, “Physically-aware HW-SW Partitioning for reconfigurable architectures with partial dynamic reconfiguration,” Design Automation Conference (DAC 2005), June 2005.

Location: Portland, OR

A. Shrivastava, N. Dutt, A. Nicolau, E. Earlie, “Compiler-in-the-Loop; ADL-driven Early Architectural Exploration,” TECHCON 2005, October 2005.download pdf