Conference Proceedings

Location: Salzburg, Austria
Website: http://www.emsoft.org/

G. Madl, S. Abdelwahed, and N. Dutt,  “Performance Estimation of Distributed Real-time Embedded Systems by Discrete Event Simulations,”  Proceedings of  the 7th Annual ACM Conference on Embedded Software(EMSOFT’07) , October 2007.

Location: Salzburg, Austria

M. Kim, M. Stehr, C. Talcott, N. Dutt and N. Venkatasubramanian, “Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters,” Proceedings of the 5th International Conference on Formal Modelling and Analysis of Timed Systems (FORMATS’07), Salzburg, Austria, October 2007.

Location: Lake Tahoe, CA
Website: http://www.iccd-conference.org/2007/

A.H. Gholamipour, E. Bozorgzadeh, S. Banerjee, “Energy-Aware Coprocessor Selection for Embedded Processors on FPGAs,” IEEE International Conference on Computer Design (ICCD), October 2007.

Houman Homayoun and Alexander V. Veidenbaum, “Reducing Power Consumption in Peripheral Circuits of L2 caches,” Proc. IEEE Intl. Conference on Computer Design, Lake Tahoe, Oct. 2007

B. Gorjiara, D. Gajski, “A Novel Profile-Driven Technique for Simultaneous Power and Code-size Optimization of Nanocoded IPs,” International Conference on Computer Design (ICCD), October 2007.

Y. Park, S. Pasricha, F.J. Kurdahi, N. Dutt, “System Level Power Estimation Methodology with H.264 Decoder Prediction IP Case Study,” International Conference on Computer Design (ICCD 2007), Lake Tahoe, October 2007.

Website: http://www.casesconference.org/

D.Cho, I. Issenin, N.D. Dutt, and Y. Paek, “Software Controlled Memory Layout Reorganization for Irregular Array Access Patterns,” Proc. Of the 2007 International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES-2007), Salzburg, Austria, October 2007.

Alex Nicolau, Carmen Badea, Alexander V. Veidenbaum, “A Simplified Java Bytecode Compilation System for Resource-Constrained Embedded Processors”,  Proc. IEEE CASES ’07, Salzburg, Austria September 30–October 3, 2007.

Location: San Jose, California
Website: http://www.iccad.com/geninfo.html

G. Schirner, R. Dömer, “Fast and Accurate Transaction Level Models using Result Oriented Modeling”, ICCAD ’06, November 2006.download pdf

Location: Seoul, Korea
Website: http://www.isocc.org/

R. Dömer, A. Gerstlauer, D. Shin, “Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components”, ISOCC ’06, October 2006.download pdf

Location: Seoul, Korea
Website: http://www.ida.liu.se/conferences/codes/2006/

D. Shin, A. Gerstlauer, J. Peng, R. Dömer, D. Gajski, “Automatic Generation of Transaction-Level Models for Rapid Design Space Exploration”, CODES+ISSS 2006, October 2006.
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G. Schirner, R. Dömer, “Accurate yet Fast Modeling of Real-Time Communication”, CODES+ISSS 2006, October 2006.
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Minyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nalini Venkatasubramanian, “Design Space Exploration of Real-time Multi-media MPSoCs with Heterogeneous Scheduling Policies”, CODES+ISSS 2006, October 2006.

Location: Dubrovnik, Croatia
Website: http://www.confman.org/dsd06/

I. Viskic, R. Dömer, “A Flexible, Syntax Independent Representation (SIR) for System Level Design Models”, DSD 2006, August 2006.download pdf

Location: San Jose, CA, USA
Website: http://www.rtas.org/rtas2006/index.htm

Minyoung Kim, Nikil Dutt, Nalini Venkatasubramanian, “Policy Construction and Validation for Energy Minimization in Cross Layered Systems: A Formal Method Approach”, RTAS’06 Work-in-Progress Session, April 2006.

Location: Munich, Germany
Website: http://www.date-conference.com/

P. Biswas and N. Dutt, “Automatic Identification of Application-Specific Funtional Units with Architecturally Visible Storage,” DATE ’06, March 2006.download pdf

R. Cornea, A. Nicolau, N. Dutt, ” Software Annotations for Power Optimization on Mobile Devices,” DATE ’06, March 2006.download pdf

S. Pasricha and N. Dutt, “COSMECA: Application Specific Co-Syntesis of Memory and Communication Architectures fo MPSoC,” DATE ’06, March 2006.download pdf

G. Schirner and R. Doemer, “Quantitative Analysis of Transaction Level Models for the AMBA Bus,” DATE ’06, March 2006.download pdf

S. Park, A. Shrivastava, N. Dutt, E. Earlie, A. Nicolau, Y. Paek, ” Automatic Generation of Operation Tables for Fast Exploration of Bypasses in Embedded Processesors,” DATE ’06, March 2006.download pdf