Conference Proceedings
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
Date: October 24-29, 2010
Location: Scottsdale, CA, USA
Website: http://www.public.asu.edu/~ashriva6/esweek2010/codesisss2010/
Garo Bournoutian, Alex Orailoglu: Dynamic, non-linear cache architecture for power-sensitive mobile processors. CODES+ISSS 2010: 187-194
Kwangyoon Lee, Alex Orailoglu: High durability in NAND flash memory through effective page reuse mechanisms. CODES+ISSS 2010: 205-212
The 12th IEEE Conference on Commerce and Enterprise Computing (CEC)
Date: November 10-12, 2010
Location: Shanghai, China
Website: http://conferences.computer.org/cec/2010/
Weiran Nie, Mark Panahi, Kwei-Jay Lin: A Flexible Schedule Reservation Scheme for Real-Time Service-Oriented Architecture. CEC 2010: 1-8
International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES)
Date: October 24-29, 2010
Location: Scottsdale, AZ, USA
Website: http://www.case2010.org/
A. Chakraborty, H. Homayoun, A. Khejah, N. Dutt, A. Eltawil, and F. Kurdahi, “E < MC^2 : Less Energy through Multi-Copy Cache,” CASES 2010:237-246
The 5th Workshop on Embedded Systems Security (WESS)
Date: October 24, 2010
Location: Scottsdale, AZ
Website: http://www.wess-workshop.org/2010/index.html
L. Bathen, N. Dutt, “PoliMakE: A Policy Making Engine for Secure Embedded Software Execution on Chip-Multiprocessors,” WESS 2010:2
The 18th International Conference on Very Large Scale Integration of System-on-Chip (VLSI-SoC)
Date: September 27-29, 2010
Location: Madrid, Spain
Website: http://vlsisoc2012.soe.ucsc.edu/
J. Nageswaran, M. Richert, N. Dutt, J. Krichmar, “Towards Reverse Engineering the Brain: Modeling Abstractions and Simulation Frameworks,” VLSI-Soc 2010:1-6
The 23rd International Workshop on Languages and Compilers for Parallel Computing (LCPC)
Date: October 7-9, 2010
Location: Houston, TX, USA
Website: http://lcpc10.rice.edu/LCPC10_Home.html
A. Nicolau, A. Kejariwal, “How Many Threads to Spawn During Program Multithreading?” LCPC 2010:166-183
International Conference on Computer Design (ICCD)
Date: October 3-6, 2010
Location: Amsterdam, Netherlands
Website: http://iccd.et.tudelft.nl/2010/
B. Arslan, A. Orailoglu,“Delay Test Quality Maximization through Process-aware Selection of Test Set Size,” ICCD 2010:390-395
Shervin Sharifi, Tajana Simunic Rosing: Package-Aware Scheduling of embedded workloads for temperature and Energy management on heterogeneous MPSoCs. ICCD 2010: 521-527
The 8th Workshop on Embedded Systems for Real-Time Multimedia (ESTImedia)
Date: October 28-29, 2010
Location: Scottsdale, AZ, USA
Website: http://www.estimedia.org/
K. Amiri, A. Khajeh, A. Eltawil, F. Kurdahi, “Process Variation Aware Transcoding for Lower Power H.264 Decoding,” ESTImedia 2010:90-96
The 23rd Symposium on Integrated Circuits and Systems Design (SBCCI)
Date: September 6-9, 2010
Location: Sao Paulo, Brazil
Website: http://cecci.sbc.org.br/eventos/sbcci/sbcci-en
F. Kurdahi, “Designing Working Systems with Imperfect Chips,” SBCCI 2010:127
IFIP International Conference on Network and Parallel Computing (NPC)
Date: September 13-15, 2010
Location: Zhengzhou, China
Website: http://grid.hust.edu.cn/npc2010/index.html
P. Nistler, J-L Gaudiot: Power Efficient Scheduling for Hard Real-Time Systems on a Multiprocessor Platform. NPC 2010: 106-120
X. Wu, Y. Lin, J-J Han, J-L Gaudiot: Energy-Efficient Scheduling of Real-Time Periodic Tasks in Multicore Systems. NPC 2010: 344-357