Comprehensive Multi-level Joint Optimization for Multi-mode FIR-like Structures
by Amir Hossein GholamipourSeptember 28, 2011
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Post-Silicon Patchable Hardware
Prof. Masahiro FujitaVLSI Design and Education Center (VDEC), The University of Tokyo and CREST
Tokyo, Japan
EH 3206
Seminar, September 23, 2011
Beyond Memory Cells for Leakage and Temperature Control in SRAM-based Units, the Peripheral Circuits Story
by Houman HomayounSeptember 3, 2011