Location: HICC, Hyderabad, India
S. Pasricha, Y. Park, S. Pasricha, Y. Park, F. Kurdahi, N. Dutt, “Incorporating PVT Variations in System-level Power Exploration of On-Chip Communication Architectures,” IEEE VLSI Design Conference (VLSID 2008), Bangalore, India, January 2008.
D. Kannan, A. Gupta, A. Shrivastava, N. Dutt, and F. Kurdahi, “PTSMT: A Tool for Cross-Level Power, Performance and Temperature Exploration of SMT Processors,” Proceedings of the 2008 International Conference on VLSI Design, Hyderabad, India, January, 2008.