IEEE Design & Test of Computers

Samar Abdi, Yonghyun Hwang, Lochi Yu, Gunar Schirner, and Daniel Gajski, “Automatic TLM Generation for Early Validation of Multicore Systems,” pp 10-19, Vol. 28, No. 3, May-June 2011.
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Weiwei Chen, Xu Han, and Rainer Doemer, “Multicore Simulation of Transaction-Level Models using the SoC Environment,” pp 20-31, Vol. 28, No. 3, May-June 2011.
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C.Park, J. Liu, and P. Chou, “B#: a Battery Emulator and Power Profiling Instrument,”
pp 150-159, March-April, 2005.

S. Pasricha, M. Luthra, S. Mohapatra, N. Dutt, N. Venkatasubramanian, “Dynamic Backlight Adaptation for Low-Power Handheld Devices,” pp 398-405, September-October 2004.
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S. Ozev, I. Bayraktaroglu, and A. Orailoglu, “Seamless Test of Digital Components in Mixed-Signal Paths,” IEEE Design & Test of Computers, pp 44-55, January-February 2004.

I. G. Harris, “Fault Models and Test Generation for Hardware-Software Covalidation,” IEEE Design and Test of Computers, Vol. 20, No. 4, July-August 2003.
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