Technical Reports

P. Mishra, M. Mamidipaka, N. Dutt, “A Framework for Memory Subsystem Exploration,” TR 02-19, May 24, 2002. download pdf


L. Cai, D. D. Gajski, “System Level Design Using SpecC Profiler,” TR 02-08, April 1, 2002. download pdf


J. Leei, K. Choi, N. Dutt, “Mapping Loops on Coarse-Grain Reconfigurable Architectures Using Memory Operation Sharing," TR 02-34, September 2002. download pdf


L. Cai, D. D. Gajski, “Parallelization Optimization of System-Level Specification,” TR 02-18, June 1, 2002. download pdf


L. Cai,D. D. Gajski, “Introduction of Design-Oriented Profiler of SpecC Language,” TR 02-07, March 1, 2002. download pdf


D. D. Gajski, “System-Level Design Flow: What is needed and what is not," TR 02-33, November 26, 2002. download pdf


A. Gerstlauer, D. D. Gajski, “System-Level Abstraction Semantics,” TR 02-17, July 12, 2002. download pdf


Q. Xie, D. D. Gajski, "Parity Checker Implementations in SpecC,” TR 02-06, January 27, 2002. download pdf


D. D. Gajski, L. Cai, “Variable Mapping of System Level Design," TR 02-32, October 8, 2002. download pdf


A. Gerstaluer, “SpecC Modeling Guidelines,” TR 02-16, April 12, 2002. download pdf


H. Yu, D. D. Gajski, “Datapath Synthesis for a 16-Bit Microprocessor,” TR 02-05, January 22, 2002. download pdf


D. D. Gajski, L. Cai, “Grouping-Based Architecture Exploration of System-Level Design," TR 02-31, August 16, 2002. download pdf


J. Peng, L. Cai, A. Gerstlauer, D. D. Gajski, “Interactive System Design Flow,” TR 02-15, April 15, 2002. download pdf


P. Mishra, N. Dutt, “Architecture Description Language driven Functional Test Program Generation for Microprocessors using SMV,” TR 02-26, September 13, 2002. download pdf


W. Mueller, R. Doemer, A. Gerstlauer, “The Formal Execution Semantics of SpecC,” TR 02-04, January 11, 2002. download pdf