Loading Events

« All Events

  • This event has passed.

Designer-in-the-Loop Recoding for Creating Safe and Parallel ESL Models

May 24, 2013 @ 3:00 pm - 4:00 pm PDT

Date/Time: Thursday, May 30, 2013, 10:00 a.m. – 11:00 a.m.
Location: CECS Conference Room, Engineering Hall 3206

Committee Members:
Rainer Dömer (Chair)
Daniel Gajski
Fadi Kurdahi

The design complexity of embedded systems increases as more processors and subsystems integrated on one chip. In order to overcome the design bottlenecks and shorten time to market, system engineers are motivated to design from a higher abstraction level, namely Electronic System Level (ESL). ESL design methodology has emerged to address the design complexity by supporting HW/SW co-specification and co-simulation, system design space exploration and high-level synthesis.

ESL design relies on an input ESL model, namely the specification model. Creating structured and parallel specification models efficiently is a prerequisite for building cost-effective embedded systems in ESL design. Practically, application reference code is reused to create the ESL models. However, the referee models lack the necessary characteristics, such as explicit parallelism, structural hierarchy and synthesizability, for ESL design. It is a time-consuming and error-prone process to manually
recode the reference models into desired ESL models.

This dissertation addresses on the automation gap of recoding. We follow the design-in-the-loop recoding methodology which efficiently combines the automation tools with designer’s knowledge. Our approach aim to expose parallelism in the ESL model and guarantee that the parallel model is safe from race conditions.

First, we identifies the essential steps in recoding and defines a recoding design flow to create safe and parallel ESL models.
Second, we contribute three automated recoding operations: variable dependency analysis to provide prompt analysis during model development, race condition analysis to assist verifying and debugging the parallelism and a high-level transformation function to instantly create loop-level parallelism. Third, we develop a recoding development platform based on Eclipse to
integrate recoding tools and facilitate the designer-in-the-loop approach.

The effectiveness of the recoding functions is shown with experiments on a set of embedded applications. Also, an classroom experiment with 68 graduate students shows our recoding approach using the Eclipse-based recoding platform increases the productivity and reduces errors in parallel ESL model development.


May 24, 2013
3:00 pm - 4:00 pm PDT
Event Category: