Job Title: Emulation Engineer
Location: Guadalajara, Mexico
Job Description: Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools. Defines and documents RTL changes required for emulation/FPGA. Develops hardware and software collaterals and integrates it with the emulation/FPGA model. Tests and debugs the emulation/FPGA model and collaterals.
Please go to: https://intel.taleo.net/careersection/10000/jobdetail.ftl?job=782035 for more details.