Technical Reports

R. Doemer, A. Gerstlauer, D. Shin, "Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components," TR 04-19, July 22, 2004. download pdf


M. Reshadi and D. Gajski, "NISC Modeling and Simulation," TR 04-08, March 2004. download pdf


A. Nacul and T. Givargis, "The Phantom Serializing Compiler," TR 04-30, November 22, 2004. download pdf


H. Yu, R. Doemer, and D. Gajski, "Automatic Software Generation for System Level Design," TR 03-18, May 14, 2003. download pdf


S. Abdi, J. Peng, H. Yu, D. Shin, A. Gerstlauer, R. Doemer, and D. Gajski, "System-on-Chip Environment: SCE Version 2.2.0 Beta Tutorial," TR 03-41, December 2003. download pdf


R. Gupta, R. Jejurikar, and C. Periera, "Dual-Mode Frequency Inheritance Algorithm for Energy Aware Task Scheduling with Task Synchronization," TR 03-07, February 28, 2003. download pdf


S. Abdi and D. Gajski, "Provably Correct Architecture Refinement," TR 03-29, September 30, 2003. download pdf


S. Banerjee and N. Dutt, "FIFO Power Optimization for On-Chip Networks," TR 03-40, December 19, 2003. download pdf


D. D. Gajski, S. Abdi, "Formal Verification of Specification Partitioning," TR 03-06, April 23, 2003. download pdf


D. Gajski, "NISC: The Ultimate Reconfigurable Component," TR 03-28, October 1, 2003. download pdf


N. Savoiu, S. Shukla, and R. Gupta, "Petri Net-based Thread Composition for Improved System Level Simulation," TR 03-39, December 29, 2003. download pdf


N. Dutt, M. Reshadi, P. Mishra, N. Bansal, "ReXsim: A Retargetable Framework for Instruction-Set Architecture Simulation," TR 03-05, February 10, 2003. download pdf


N. Bansal, S. Gupta, N. Dutt, A. N, and R. Gupta, "Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures," TR03-27, August 2003. download pdf