Technical Reports

S. Pasricha, N. Dutt, and M. Ben-Romdhane, " Automated Synthesis of Bus Architectures for Systems with Throughput Constraints," TR 04-20, August 2004. download pdf


R. Jejurikar and R. Gupta, "Procrastination Scheduling in Fixed Priority Real-Time Systems," TR 04-09, April, 2004. download pdf


R. Jejurikar and R. Gupta, "Leakage Aware Dynamic Slack Reclamation in Real-Time," TR 04-31, November 2004. download pdf


R. Doemer, A. Gerstlauer, D. Shin, "Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components," TR 04-19, July 22, 2004. download pdf


L. Cai, A. Gerstlauer, S. Abdi, J. Peng, D. Shin, H. Yu, R. Doemer, D. Gajski, "System-on-Chip Environment (SCE Version 2.2.0 Beta): Manual," TR 03-45, December 2003. download pdf

D. Shin, A. Gerstlauer, R. Doemer, and D. Gajski, "C-based Interactive RTL Design Methodology," TR 03-42, December 1, 2003. download pdf


D. D. Gajski and S. Abdi, "Automatic Communication Refinement for System Level Design," TR 03-08, March 7, 2003. download pdf


A. Gerstlauer, "Communication Abstractions for System-Level Design and Synthesis," TR 03-30, October 24, 2003. download pdf


S. Abdi, J. Peng, H. Yu, D. Shin, A. Gerstlauer, R. Doemer, and D. Gajski, "System-on-Chip Environment: SCE Version 2.2.0 Beta Tutorial," TR 03-41, December 2003. download pdf


R. Gupta, R. Jejurikar, and C. Periera, "Dual-Mode Frequency Inheritance Algorithm for Energy Aware Task Scheduling with Task Synchronization," TR 03-07, February 28, 2003. download pdf


S. Abdi and D. Gajski, "Provably Correct Architecture Refinement," TR 03-29, September 30, 2003. download pdf


S. Banerjee and N. Dutt, "FIFO Power Optimization for On-Chip Networks," TR 03-40, December 19, 2003. download pdf


D. D. Gajski, S. Abdi, "Formal Verification of Specification Partitioning," TR 03-06, April 23, 2003. download pdf


D. Gajski, "NISC: The Ultimate Reconfigurable Component," TR 03-28, October 1, 2003. download pdf