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• Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski, "An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors," IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 16, no. 4, pp. 466-475, April 2008.
• Gunar Schirner, Andreas Gerstlauer, Rainer Dömer, "Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications," Proceedings of the Asia and South Pacific Design Automation Conference, Seoul, Korea, January 2008.

• Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel D. Gajski, "Automatic Layer-Based Generation of System-On-Chip Bus Communication Models," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 9, pp. 1676-1687, September 2007.
• Gunar Schirner, Andreas Gerstlauer, Rainer Dömer, "Abstract, Multifaceted Modeling of Embedded Processors for System Level Design," Proceedings of the Asia and South Pacific Design Automation Conference, Yokohama, Japan, January 2007.
• Andreas Gerstlauer, Dongwan Shin, Samar Abdi, Pramod Chandraiah and Daniel D. Gajski, "Design of a MP3 Decoder using the System-On-Chip Environment (SCE)," CECS, UC Irvine, Technical Report CECS-TR-07-05, November 2007.

• Rainer Dömer, Andreas Gerstlauer, Dongwan Shin, "Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components," Proceedings of the International SoC Design Conference, Seoul, Korea, October 2006.
• Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski, "Automatic Generation of Transaction-Level Models for Rapid Design Space Exploration," Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, Seol, Korea, October 2006.

• Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski, "Automatic Generation of Communication Architectures," in From Specification to Embedded Systems Application, edited by Achim Rettberg, Mauro C. Zanella, Franz Rammig, Springer Science+Business Media, New York, NY, ISBN 0-387-27557-6, September 2005.
• Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski, "Automatic Network Generation for System-On-Chip Communication Design," Proceedings of the Internation Conference on Hardware/Software Codesign and System Synthesis, New York, NY, September 2005.
• Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski, "System-Level Communication Modeling for Network-On-Chip Synthesis," Proceedings of the Asia and South Pacific Design Automation Conference, Shanghai, China, January 2005.
• Lukai Cai, Andreas Gerstlauer, Daniel D. Gajski, "Multi-Metric and Multi-Entity Characterization of Applications for Early System Design Exploration," Proceedings of the Asia and South Pacific Design Automation Conference, Shanghai, China, January 2005.

• Lukai Cai, Andreas Gerstlauer, Daniel D. Gajski, "Retargetable Profiling for Rapid, Early System-Level Design Space Exploration," Proceedings of the Design Automation Conference, San Diego, CA, June 2004.
• Lucai Cai, Haobo Yu, Daniel D. Gajski, "A Novel Memory Size Model for Variable-Mapping In System Level Design," Proceedings of the Asia and South Pacific Design Automation Conference, Yokohama, Japan, January 2004.
• Dongwan Shin, Samar Abdi, Daniel D. Gajski, "Automatic Generation of Bus Functional Models from Transaction level Models," Proceedings of the Asia and South Pacific Design Automation Conference, Yokohama, Japan, January 2004.
• Haobo Yu, Rainer Dömer, Daniel D. Gajski, "Embedded Software Generation from System Level Design Languages," Proceedings of the Asia and South Pacific Design Automation Conference, Yokohama, Japan, January 2004.
• Rainer Dömer, Andreas Gerstlauer, and Dongwan Shin, "Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components," CECS, UC Irvine, Technical Report CECS-TR-04-19, July 2004.
• Lucai Cai, Andreas Gerstlauer, and Daniel Gajski, "Retargetable Profiling for Rapid, Early System-Level Design Space Exploration," CECS, UC Irvine, Technical Report CECS-TR-04-04, October 2003.

• Andreas Gerstlauer, Haobo Yu, Daniel D. Gajski, "RTOS Modeling for System-Level Design," Proceedings of Design, Automation & Test in Europe, Munich, Germany, March 2003.
• Samar Abdi, Dongwan Shin, Daniel D. Gajski, "Automatic Communication Refinement for System Level Design," Proceedings of Design Automation Conference, Anaheim, CA, June 2003.
• Lucai Cai and Daniel Gajski, "Transaction Level Modeling: An Overview," Proceedings of the International Conference on Hardware/Software Codesign & System Synthesis, Newport Beach, CA, October 2003.
• Haobo Yu, Andreas Gerstlauer, Daniel Gajski, "RTOS Scheduling in Transaction Level Models," Proceedings of the International Conference on Hardware/Software Codesign & System Synthesis, Newport Beach, CA, October 2003.
• Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski, "C-based Interactive RTL Design Methodology," CECS, UC Irvine, Technical Report CECS-TR-03-42, December 2003.
• Samar Abdi, Junyu Peng, Haobo Yu, Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski, "System-on-Chip Environment (SCE Version 2.2.0 Beta): Tutorial," CECS, UC Irvine, Technical Report CECS-TR-03-41, July 2003.
• Dongwan Shin, Samar Abdi, Daniel Gajski, "Automatic Generation of Bus Functional Models from Transaction Level Models," CECS, UC Irvine, Technical Report CECS-TR-03-33, November 2003.
• Andreas Gerstlauer, "Communication Abstractions for System-Level Design and Synthesis," CECS, UC Irvine, Technical Report CECS-TR-03-30, October 2003.
• Samar Abdi and Daniel D. Gajski, "Provably Correct Architecture Refinement," CECS, UC Irvine, Technical Report CECS-TR-03-29, September 2003.
• Kiran Ramineni and Daniel Gajski, "C to SpecC Conversion Style," CECS, UC Irvine, Technical Report CECS-TR-03-13, April 2003.
• Haobo Yu, Andreas Gerstlauer, Daniel Gajski, "RTOS Scheduling in Transaction Level Models," CECS, UC Irvine, Technical Report CECS-TR-03-12, March 2003.
• Lucai Cai, Shireesh Verma, Daniel D. Gajski, "Comparison of SpecC and SystemC Languages for System Design," CECS, UC Irvine, Technical Report CECS-TR-03-11, May 2003.
• Lucai Cai and Daniel Gajski, "Transaction Level Modeling in System," CECS, UC Irvine, Technical Report CECS-TR-03-10, March 2003.
• Samar Abdi and Daniel Gajski, "Automatic Communication Refinement for System Level Design," CECS, UC Irvine, Technical Report CECS-TR-03-08, March 2003.
• Samar Abdi and Daniel Gajski, "Formal Verification of Specification Partitioning," CECS, UC Irvine, Technical Report CECS-TR-03-06, March 2003.
• Lukai Cai and Daniel Gajski, "Channel Mapping in System Level Design," CECS, UC Irvine, Technical Report CECS-TR-03-03, January 2003.
• Daniel Gajski, Junyu Peng, Andreas Gerstlauer, Haobo Yu, Dongwan Shin, "System Design Methodology and Tools," CECS, UC Irvine, Technical Report CECS-TR-03-02, January 2003.

• Slim Ben Saoud, Daniel D. Gajski, Rainer Dömer, "Specification and Validation of New Control Algorithms for Electric Drives Using SpecC Language," Proceedings International Conference on Systems, Man and Cybernetics, Hammamet, Tunisia, October 2002.
• Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer, "Seamless approach for the design of control systems for Power Electronics and Electric Drives," Proceedings International Conference on Systems, Man and Cybernetics, Hammamet, Tunisia, October 2002.
• Andreas Gerstlauer and Daniel D. Gajski, "System-Level Abstraction Semantics," Proceedings of International Symposium on System Synthesis, Kyoto, Japan, October 2002.
• Junyu Peng and Daniel D. Gajski, "Optimal Message-Passing for Data Coherency in Distributed Architecture," Proceedings of International Symposium on System Synthesis, Kyoto, Japan, October 2002.
• W. Mueller, R. Dömer, A. Gerstlauer, "The Formal Execution Semantics of SpecC," Proceedings of International Symposium on System Synthesis, Kyoto, Japan, October 2002.
• Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer, "Co-design of Embedded Controllers for Power Electronics and Electric Systems," Proceedings International Symposium on Intelligent Control, Vancouver, Canada, October 2002.
• Slim Ben Saoud, Daniel D. Gajski, Andreas Gerstlauer, "Co-design of Emulators for Power electric Processes Using SpecC Methodology," Proceedings 28th Annual Conference of the IEEE Industrial Electronics Society, Sevilla, Spain, November 2002.
• R. Dömer, A. Gerstlauer, P. Kritzinger, M. Olivarez, "The SpecC System-Level Design Language and Methodology, Part 2," Embedded Systems Conference, San Francisco, March 2002.
• Rainer Dömer, "The SpecC System-Level Design Language and Methodology, Part 1," Embedded Systems Conference, San Francisco, March 2002.
• R. Dömer, A. Gerstlauer, D. Gajski, "SpecC Methodology for High-Level Modeling," 9th IEEE/DATC Electronic Design Processes Workshop, Monterey, April 2002.
• Daniel D. Gajski, "System Level Design Flow: What is needed and what is not," CECS, UC Irvine, Technical Report CECS-TR-02-33, November 2002.
• Lukai Cai, Daniel D. Gajski, "Variable Mapping of System Level Design," CECS, UC Irvine, Technical Report CECS-TR-02-32, October 2002.
• Lukai Cai, Daniel D. Gajski, "Grouping-Based Architecture Exploration of System-Level Design," CECS, UC Irvine, Technical Report CECS-TR-02-31, August 2002.
• Lukai Cai, Daniel D. Gajski, Mike Olivarez, Paul Kritzinger, "C/C++ Based System Design Flow Using SpecC, VCC and SystemC," CECS, UC Irvine, Technical Report CECS-TR-02-30, June 2002.
• S. Abdi, J. Peng, R. Dömer, D. Shin, A. Gerstlauer, A. Gluhak, L.Cai, Q. Xie, H. Yu, P. Zhang, D. Gajski, "System-On-Chip Environment (SCE): Tutorial," CECS, UC Irvine, Technical Report CECS-TR-02-28, September 2002.
• Haobo Yu, Daniel D. Gajski, "RTOS Modeling in System Level Synthesis," CECS, UC Irvine, Technical Report CECS-TR-02-25, August 2002.
• Lukai Cai, Daniel D. Gajski, "Specification Tuning of System-Level Design," CECS, UC Irvine, Technical Report CECS-TR-02-20, June 2002.
• Lukai Cai, Daniel D. Gajski, "Parallelization Optimization of System-Level Specification," CECS, UC Irvine, Technical Report CECS-TR-02-18, June 2002.
• Andreas Gerstlauer, Daniel D. Gajski, "System-Level Abstraction Semantics," CECS, UC Irvine, Technical Report CECS-TR-02-17, July 2002.
• Andreas Gerstlauer, "SpecC Modeling Guidelines," CECS, UC Irvine, Technical Report CECS-TR-02-16, April 2002.
• Junyu Peng, Lukai Cai, Andreas Gerstlauer, Daniel D. Gajski, "Interactive System Design Flow," CECS, UC Irvine, Technical Report CECS-TR-02-15, April 2002.
• Junyu Peng, Samar Abdi, Daniel D. Gajski, "Automatic Model Refinement for Fast Architecture Exploration," CECS, UC Irvine, Technical Report CECS-TR-02-14, April 2002.
• Dongwan Shin, Daniel D. Gajski, "Interface Synthesis from Protocol Specification," CECS, UC Irvine, Technical Report CECS-TR-02-13, April 2002.
• Dongwan Shin, Daniel D. Gajski, "Queue Generation Algorithm for Interface Synthesis," CECS, UC Irvine, Technical Report CECS-TR-02-12, February 2002.
• Dongwan Shin, Daniel D. Gajski, "Scheduling in RTL Design Methodology," CECS, UC Irvine, Technical Report CECS-TR-02-11, April 2002.
• Lukai Cai, Daniel D. Gajski, "System Level Design Using SpecC Profiler," CECS, UC Irvine, Technical Report CECS-TR-02-08, April 2002.
• Lukai Cai, Daniel D. Gajski, "Introduction of Design-Oriented Profiler of SpecC Language," CECS, UC Irvine, Technical Report CECS-TR-02-07, March 2002.
• Qiang Xie, Daniel D. Gajski, "Parity Checker Implementations in SpecC," CECS, UC Irvine, Technical Report CECS-TR-02-06, January 2002.
• Wolfgang Mueller, Rainer Dömer, Daniel D. Gajski, "The Formal Execution Semantics of SpecC," CECS, UC Irvine, Technical Report CECS-TR-02-04, January 2002.

• A. Gerstlauer, R. Dömer, J. Peng, D. D. Gajski, System Design: A Practical Guide with SpecC, Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-7387-1, June 2001.
• A. Rettberg, F. Rammig, A. Gerstlauer, D. Gajski, W. Hardt, B. Kleinjohann, "The Specification Language SpecC within the PARADISE Design Environment," in Architecture and Design of Distributed Embedded Systems, edited by Bernd Kleinjohann, Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-7345-6, April 2001.
• Dongwan Shin, Daniel D. Gajski, "Scheduling in RTL Design Methodology," UC Irvine, Technical Report ICS-TR-01-65, July 2001.
• Wolfgang Mueller, Rainer Dömer, Andreas Gerstlauer, "The Formal Execution Semantics of SpecC," UC Irvine, Technical Report ICS-TR-01-59, November 2001.
• Slim Ben Saoud, Daniel D. Gajski, "Co-design of Emulators for Power electric Processes Using SpecC Methodology," UC Irvine, Technical Report ICS-TR-01-46, July 2001.
• Slim Ben Saoud, Daniel D. Gajski, "SpecC Methodology applied to the Design of Control systems for Power Electronics and Electric Drives," UC Irvine, Technical Report ICS-TR-01-45, July 2001.
• Slim Ben Saoud, Daniel D. Gajski, "Specification and Validation of New Control Algorithms for Electric Drives using SpecC Language," UC Irvine, Technical Report ICS-TR-01-44, July 2001.
• Haobo Yu, Daniel D. Gajski, "Interconnection Binding in RTL Design Methodology," UC Irvine, Technical Report ICS-TR-01-38, June 2001.
• Pei Zhang, Daniel D. Gajski, "Storage Binding in RTL Synthesis," UC Irvine, Technical Report ICS-TR-01-37, August 2001.
• Qiang Xie, Daniel D. Gajski, "Function Binding in RTL Design Methodology," UC Irvine, Technical Report ICS-TR-01-37, June 2001.
• Martin von Weymarn, "Development of a Specification Model of the EFR Vocoder," UC Irvine, Technical Report ICS-TR-01-35, July 2001.
• David Berner, Dirk Jansen, Daniel D. Gajski, "Development of a Visual Refinement and Exploration Tool for SpecC," UC Irvine, Technical Report ICS-TR-01-12, March 2001.

• D. D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, S. Zhao, SpecC: Specification Language and Methodology, Japanese Edition, CQ Publishing, Japan, ISBN 4-7898-3353-4, December 2000, 328 pages.
• D. D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, S. Zhao, SpecC: Specification Language and Methodology, Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-7822-9, March 2000, 336 pages.
• A. Gerstlauer, S. Zhao, D. Gajski, A. Horak, "SpecC System-Level Design Methodology Applied to the Design of a GSM Vocoder," Proceedings of the Ninth Workshop on Synthesis and System Integration of Mixed Technologies, Kyoto, Japan, April 2000.
• Rainer Dömer and Daniel D. Gajski, "Reuse and Protection of Intellectual Property in the SpecC System," Proceedings of Asia and South Pacific Design Automation Conference, Yokohama, Japan, January, 2000.
• Lucai Cai, Daniel D. Gajski, "Introduction of Design-Oriented Profiler of SpecC Language," UC Irvine, Technical Report ICS-TR-00-47, June 2001.
• Pei Zhang, Dongwan Shin, Haobo Yu, Qiang Xie, Daniel D. Gajski, "SpecC RTL Methodology," UC Irvine, Technical Report ICS-TR-00-44, December 2000.
• Hanyu Yin, Haito Du, Tzu-Chia Lee, Daniel D. Gajski, "Design of a JPEG Encoder using SpecC Methodology," UC Irvine, Technical Report ICS-TR-00-23, July 2000.
• Dirk Jansen, "SpecC for Beginners: The Example of a Sounding Dice," UC Irvine, Technical Report ICS-TR-00-14, May 2000.
• Junyu Peng, Lukai Cai, Anand Selka, Daniel D. Gajski, "Design of a JBIG Encoder using SpecC Methodology," UC Irvine, Technical Report ICS-TR-00-13, June 2000.

• D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, S. Zhao, "The SpecC Methodology" UC Irvine, Technical Report ICS-TR-99-56, December 1999.
• L. Cai, J. Peng, C. Chang, A. Gerstlauer, H. Li, A. Selka, C. Siska, L. Sun, S. Zhao and D. Gajski, "Design of a JPEG Encoding System," UC Irvine, Technical Report ICS-TR-99-54, November 1999.
• En-Shou Chang and Daniel D. Gajski, "SpecC System-level Static Scheduling," UC Irvine, Technical Report ICS-TR-99-23, May 1999.
• Andreas Gerstlauer, Shuqing Zhao, Daniel D. Gajski and Arkady M. Horak, "Design of a GSM Vocoder using SpecC Methodology," UC Irvine, Technical Report ICS-TR-99-11, March 1999.
• Daniel D. Gajski, Rainer Dömer, Jianwen Zhu, "IP-centric Methodology and Design with the SpecC Language," Chapter 10 in System-Level Synthesis, Proceedings of the NATO ASI on System Level Sythesis for Electronic Design, Il Ciocco, Lucca, Italy, Aug. 1998, edited by Ahmed A. Jerraya, Jean P. Mermet, Kluwer Academic Publishers, Dordrecht, ISBN 0-7923-5749-3, May 1999.
• Rainer Dömer, "The SpecC Internal Representation," UC Irvine, Internal Technical Report, January 1999.

• Rainer Dömer, Daniel D. Gajski, Jianwen Zhu, "Specification and Design of Embedded Systems," it+ti magazine, Oldenbourg Verlag, Munich, Germany, No. 3, June 1998.
• Andreas Gerstlauer, Shuqing Zhao and Daniel D. Gajski, "VHDL+/SpecC Comparisons - A Case Study," UC Irvine, Technical Report ICS-TR-98-23, May 1998.
• Rainer Dömer, Jianwen Zhu, Daniel D. Gajski, "The SpecC Language Reference Manual," UC Irvine, Technical Report ICS-TR-98-13, March 1998.
• Daniel D. Gajski, Gaurav Aggarwal, En-Shou Chang, Rainer Doemer, Tadatoshi Ishii, Jon Kleinsmith and Jianwen Zhu, "Methodology for Co-design of Embedded Systems," UC Irvine, Technical Report ICS-TR-98-07, March 1998.

• Jianwen Zhu, Rainer Doemer and Daniel D. Gajski, "Syntax and Semantics of the SpecC Language," Proceedings of the Synthesis and System Integration of Mixed Technologies 1997, Osaka, Japan, December 1997.
• Daniel D. Gajski, Jianwen Zhu, Rainer Doemer, "Essential Issues in Codesign," UC Irvine, Technical Report ICS-TR-97-26, June 1997.
• Jianwen Zhu, Rainer Doemer, Daniel D. Gajski, "Syntax and Semantics of the SpecC+ Language," UC Irvine, Technical Report ICS-TR-97-16, April 1997.
• Daniel D. Gajski, Jianwen Zhu, Rainer Doemer, "The SpecC+ Language," UC Irvine, Technical Report ICS-TR-97-15, April 15, 1997.
• Daniel D. Gajski, Jianwen Zhu, Rainer Dömer, "Essential Issues in Codesign," Chapter 1 in Hardware/Software Co-Design: Principles and Practice edited by Jørgen Staunstrup and Wayne Wolf, Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-8013-4, October 1997.