ESMG Publications


Note: Due to copyright issues we are not able to provide downloads for most of the Cadlab book publications.


Book Chapters:

  • Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski, "An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors," IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 16, no. 4, pp. 466-475, April 2008.
  • Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel D. Gajski, "Automatic Layer-Based Generation of System-On-Chip Bus Communication Models," IEEE Transactions on Design Computer-Aided of Integrated Circuits and Systems, vol. 26, no. 9, pp. 1676-1687, September 2007.
  • Rainer Dömer, Daniel D. Gajski, Jianwen Zhu, "Specification and Design of Embedded Systems," it+ti magazine, Oldenbourg Verlag, Munich, Germany, no. 3, June 1998.
  • En-Shou Chang, Daniel D. Gajski, Sanjiv Narayan "An Optimal Clock Period Selection Method Based on Slack Minimization Criteria," ACM Transactions on Design Automation of Electronic Systems, vol. 1, no. 3, pp. 352-370, July 1996.
  • J. Gong, D.D. Gajski, S. Bakshi, "Model Refinement for Hardware-Software Codesign," ACM Transactions on DA of Electronic Systems, Vol. 2, No. 1, Jan, 1997, pp. 22-41.
  • S. Bakshi, D.D. Gajski, "Components Selection for High Performance Pipelines," IEEE Trans. on VLSI Systems, Vol. 4, No. 2, June, 1996, pp. 181-194.
  • D.D. Gajski, S. Narayan, L. Ramachandran, F. Vahid, and P. Fung, "System Design Methodologies: Aiming at the 100 Hour Design Cycle," IEEE Trans. on VLSI Systems, Vol. 4, No. 1, March, 1996, pp. 70-82.
  • J. Gong, D.D. Gajski, A. Nicolau, "Performance Evaluation for Application Specific Architectures," IEEE Trans. on VLSI Systems Vol. 3, No. 4, December, 1995, pp. 483-496.
  • F. Vahid, D.D. Gajski, "Incremental Hardware Estimation During Hardware/Software Functional Partitioning," IEEE Trans. on VLSI Systems, Vol. 3, No. 3, September 1995, pp. 459-463.
  • F. Vahid, S. Narayan, D.D. Gajski, "SpecCharts: A VHDL Front-End for Embedded Systems," Trans. on CAD, Vol. 14, No. 6, June 1995, pp. 694-706.
  • D.D. Gajski, F. Vahid, "Specification and Design of Embedded Hardware-Software Systems," IEEE Designs Test of Computers, Vol. 12, No. 1, 1995, pp. 53-67.
  • D.D. Gajski, L. Ramachandran, "Introduction to High-Level Synthesis," IEEE Design and Test of Computers, Vol. 11, No. 4, 1994, pp. 44-54.
  • T-F. Lee, A. C-H. Wu, Y-L. Lin, D.D. Gajski, "A Transformation-based Method for Loop Folding," IEEE Transactions on CAD, Vol. 13, No. 3, April 1994, pp. 439-450.


Technical Reports

2007: 2006: 2005:
  • Daniel Gajski, Andreas Gerstlauer, Rainer Dömer, Samar Abdi, Jerry Peng and Dongwan Shin, "TL Environment," CECS, UC Irvine, Technical Report CECS-TR-05-10, July 2005.
2004: 2003: 2002: 2001: 2000: 1999: 1998: 1997: 1996 and earlier...

05/22/06 A. Gerstlauer (