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CASES'08
Author Index
Alkabani, Yousra
Active Control and Digital Rights Management of Integrated Circuit IP Cores (page 227)
Altman, Erik
Foreword
Ansaloni, Giovanni
Compiling Custom Instructions onto Expression-Grained Reconfigurable Architectures (page 51)
Ansari, Amin
StageNetSlice: A Reconfigurable Microarchitecture Building Block for Resilient CMP Systems (page 1)
Athas, William
Power on Demand for Mobile Computing Devices (page 79)
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Attarzadeh Niaki, Seyed Hosein
Design Space Exploration for Field Programmable Compressor Trees (page 207)
Bacon, David
Optimus: Efficient Realization of Streaming Applications on FPGAs (page 41)
Baiocchi, José A.
Reducing Pressure in Bounded DBT Code Caches (page 109)
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Binder, Walter
Cache-aware Cross-profiling for Java Processors (page 127)
Biswas, Partha
Comprehensive Isomorphic Subtree Enumeration (page 177)
Blome, Jason
StageNetSlice: A Reconfigurable Microarchitecture Building Block for Resilient CMP Systems (page 1)
Bonzini, Paolo
Compiling Custom Instructions onto Expression-Grained Reconfigurable Architectures (page 51)
Bouchez, Florent
Advanced Conservative and Optimistic Register Coalescing (page 147)
Brisk, Philip
Design Space Exploration for Field Programmable Compressor Trees (page 207)
Cevrero, Alessandro
Design Space Exploration for Field Programmable Compressor Trees (page 207)
Chakrapani, Lakshmi N. B.
Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic (page 187)
Chang, Hoseok
Efficient Vectorization of SIMD Programs with Non-aligned and Irregular Data Access Hardware (page 167)
Childers, Bruce R.
Reducing Pressure in Bounded DBT Code Caches (page 109)
Darte, Alain
Advanced Conservative and Optimistic Register Coalescing (page 147)
Davidson, Jack W.
Reducing Pressure in Bounded DBT Code Caches (page 109)
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Dubach, Christophe
Exploring and Predicting the Architecture/Optimising Compiler Co-Design Space (page 31)
Edwards, Stephen A.
Predictable Programming on a Precision Timed Architecture (page 137)
Feng, Shuguang
StageNetSlice: A Reconfigurable Microarchitecture Building Block for Resilient CMP Systems (page 1)
Flautner, Krisztian
SoC-C: Efficient Programming Abstractions for Heterogeneous Multicore Systems on Chip (page 99)
George, Jason
Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic (page 187)
Ghodrat, Mohammad Ali
Control Flow Optimization in Loops using Interval Analysis (page 157)
Givargis, Tony
Control Flow Optimization in Loops using Interval Analysis (page 157)
Grimley-Evans, Edmund
SoC-C: Efficient Programming Abstractions for Heterogeneous Multicore Systems on Chip (page 99)
Gupta, Shantanu
StageNetSlice: A Reconfigurable Microarchitecture Building Block for Resilient CMP Systems (page 1)
Gurkaynak, Frank K.
Design Space Exploration for Field Programmable Compressor Trees (page 207)
Haider, Syed I.
A Low-Power Parallel Design of Discrete Wavelet Transform using Subthreshold Voltage Technology (page 235)
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Hartel, Pieter H.
Power Management of MEMS-Based Storage Devices for Mobile Systems (page 245)
Henry, Michael B.
A Low-Power Parallel Design of Discrete Wavelet Transform using Subthreshold Voltage Technology (page 235)
Hiser, Jason D.
Reducing Pressure in Bounded DBT Code Caches (page 109)
Hom, Jerry
Execution Context Optimization for Disk Energy (page 255)
Homayoun, Houman
Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors (page 197)
Hormati, Amir
Optimus: Efficient Realization of Streaming Applications on FPGAs (page 41)
Huang, Chen
Dynamic Coprocessor Management for FPGA-Enhanced Compute Platforms (page 71)
Ibrahim, Khaled Z.
Multi-granularity Sampling for Simulating Concurrent Heterogeneous Applications (page 217)
Ienne, Paolo
Design Space Exploration for Field Programmable Compressor Trees (page 207)
Jones, Timothy M.
Exploring and Predicting the Architecture/Optimising Compiler Co-Design Space (page 31)
Khatib, Mohammed G.
Power Management of MEMS-Based Storage Devices for Mobile Systems (page 245)
Kim, Sungjun
Predictable Programming on a Precision Timed Architecture (page 137)
Koushanfar, Farinaz
Active Control and Digital Rights Management of Integrated Circuit IP Cores (page 227)
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Kremer, Ulrich
Execution Context Optimization for Disk Energy (page 255)
Kudlur, Manjunath
Optimus: Efficient Realization of Streaming Applications on FPGAs (page 41)
Leblebici, Yusuf
Design Space Exploration for Field Programmable Compressor Trees (page 207)
Lee, Edward A.
Predictable Programming on a Precision Timed Architecture (page 137)
Lickly, Ben
Predictable Programming on a Precision Timed Architecture (page 137)
Lin, Yuan
SoC-C: Efficient Programming Abstractions for Heterogeneous Multicore Systems on Chip (page 99)
Lingamneni, Avinash
Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic (page 187)
Liu, Isaac
Predictable Programming on a Precision Timed Architecture (page 137)
Lysecky, Roman
Non-Intrusive Dynamic Application Profiler for Detailed Loop Execution Characterization (page 23)
Mahlke, Scott
StageNetSlice: A Reconfigurable Microarchitecture Building Block for Resilient CMP Systems (page 1)
Optimus: Efficient Realization of Streaming Applications on FPGAs (page 41)
Makhzan, Mohammad
Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors (page 197)
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Martonosi, Margaret
ZebraNet and Beyond: Applications and Systems Support for Mobile, Dynamic Networks (page 21)
Moret, Philippe
Cache-aware Cross-profiling for Java Processors (page 127)
Muntimadugu, Kirthi Krishna
Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic (page 187)
Nair, Ajay
Non-Intrusive Dynamic Application Profiler for Detailed Loop Execution Characterization (page 23)
Nazhandali, Leyla
A Low-Power Parallel Design of Discrete Wavelet Transform using Subthreshold Voltage Technology (page 235)
Niar, Smail
Multi-granularity Sampling for Simulating Concurrent Heterogeneous Applications (page 217)
Nicolau, Alex
Control Flow Optimization in Loops using Interval Analysis (page 157)
Nicopoulos, Chrysostomos
Design Space Exploration for Field Programmable Compressor Trees (page 207)
O'Boyle, Michael F. P.
Exploring and Predicting the Architecture/Optimising Compiler Co-Design Space (page 31)
Orailoglu, Alex
A Light-weight Cache-based Fault Detection and Checkpointing Scheme for MPSoCs Enabling Relaxed Execution Synchronization (page 11)
Palem, Krishna V.
Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic (page 187)
Palermo, Gianluca
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures (page 81)
Parameswaran, Sridevan
Foreword
Patel, Hiren D.
Predictable Programming on a Precision Timed Architecture (page 137)
Pozzi, Laura
Compiling Custom Instructions onto Expression-Grained Reconfigurable Architectures (page 51)
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Puffitsch, Wolfgang
Decoupled Root Scanning in Multi-Processor Systems (page 91)
Rabbah, Rodric
Optimus: Efficient Realization of Streaming Applications on FPGAs (page 41)
Rastello, Fabrice
Advanced Conservative and Optimistic Register Coalescing (page 147)
Reid, Alastair D.
SoC-C: Efficient Programming Abstractions for Heterogeneous Multicore Systems on Chip (page 99)
Rose, Jonathan
VESPA: Portable, Scalable, and Flexible FPGA-Based Vector Processors (page 61)
Schoeberl, Martin
Cache-aware Cross-profiling for Java Processors (page 127)
Silvano, Cristina
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures (page 81)
Steffan, J. Gregory
VESPA: Portable, Scalable, and Flexible FPGA-Based Vector Processors (page 61)
Sun, Yu
Efficient Code Caching to Improve Performance and Energy Consumption for Java Applications (page 119)
Sung, Wonyong
Efficient Vectorization of SIMD Programs with Non-aligned and Irregular Data Access Hardware (page 167)
Tawk, Melhem
Multi-granularity Sampling for Simulating Concurrent Heterogeneous Applications (page 217)
Vahid, Frank
Dynamic Coprocessor Management for FPGA-Enhanced Compute Platforms (page 71)
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Veidenbaum, Alex
Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors (page 197)
Venkataramani, Girish
Comprehensive Isomorphic Subtree Enumeration (page 177)
Villa, Oreste
Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures (page 81)
Villazón, Alex
Cache-aware Cross-profiling for Java Processors (page 127)
Yang, Chengmo
A Light-weight Cache-based Fault Detection and Checkpointing Scheme for MPSoCs Enabling Relaxed Execution Synchronization (page 11)
Yiannacouras, Peter
VESPA: Portable, Scalable, and Flexible FPGA-Based Vector Processors (page 61)
Zhang, Wei
Efficient Code Caching to Improve Performance and Energy Consumption for Java Applications (page 119)
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