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20th IEEE International Parallel & Distributed
Processing Symposium
April 25-29, 2006
Rhodes Island, Greece

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Technical Committee on
Parallel Processing

 

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High-Performance, Power-Aware Computing - HPPAC

 

Workshop Introduction - HPPAC
 

Conjugate Gradient Sparse Solvers: Performance-Power Characteristics
Konrad Malkowski, Ingyu Lee, Padma Raghavan, Mary Jane Irwin

Integrated Link/CPU Voltage Scaling for Reducing Energy Consumption of Parallel Sparse Matrix Applications
Seung Woo Son, Konrad Malkowski, Guilin Chen, Mahmut Kandemir, Padma Raghavan

Profile-based Optimization of Power Performance by using Dynamic Voltage Scaling on a PC cluster
Yoshihiko Hotta, Mitsuhisa Sato, Hideaki Kimura, Satoshi Matsuoka, Taisuke Boku, Daisuke Takahashi

Online Strategies for High-Performance Power-Aware Thread Execution on Emerging Multiprocessors
Matthew Curtis-maury, James Dzierwa, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos

Dynamic Power Saving in Fat-Tree Interconnection Networks Using On/Off Links
Marina Alonso, Salvador Coll, Juan-miguel Martinez, Vicente Santonja, Pedro Lopez, Jose Duato

Making a Case for a Green500 List
Sushant Sharma, Chung-hsing Hsu, Wu-chun Feng

Power-Performance Efficiency of Asymmetric Multiprocessors for Multi-threaded Scientific Applications
Ryan E. Grant, Ahmad Afsahi

Compiler And Runtime Support For Predictive Control Of Power And Cooling
Henry G. Dietz, William R. Dieter

MegaProto/E: Power-Aware High-Performance Cluster with Commodity Technology
Taisuke Boku, Mitsuhisa Sato, Daisuke Takahashi, Hiroshi Nakashima, Hiroshi Nakamura, Satoshi Matsuoka, Yoshihiko Hotta

 

 

 

 

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