EECS 31/CSE 31/ICS 151 Homework 6 Questions with Strategies
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Problem 1
Question
(Registers) Design a register with two load signals, that enable the loading of data from two different sources.
Strategy
- Assign the different encoding value for selecting different sourses. Here we use 00 to select register output Qi, 01 to select source Ai, 10 to select source Bi.
- For each bit of register, use a 4-to-1 selector and connect Qi output of the register to the '00' input of the selector, connect Ai and Bi to the '01' and '10' inputs of the selector repectively.
- Connect input S0, S1 to the correspondent inputs of all selectors.
Problem 2
Question
(Shift-Registers) Using a 4-bit shift register, construct a 4-bit register that can rotate its content one position to the left or right.
Strategy
Connect the left-most and rigth-most output lines to the IR and IL input lines respectively.
Problem 3
Question
(Counters) Design a 4-bit binary counter that counts up only in:
- Even numbers (0, 2, 4, 6, 8, ...)
Strategy
- Develop next-state table.
- Write the next-state equations.
- Draw logic schematic.
Problem 4
Question
(Register files) Design an 8 x 4 register file with:
- One write and two read ports
Strategy
- Design a register-file cell using an 2-to-1 selector, an D flip-flop and two tristate drivers.
- Design the whole register file with 32 register-file cells and three 3-to-8 decoders. Use one decoder to decode the write address, use the other two decoders to decode two read addresses.
Problem 5
Question
(Memories) Design:
- 256K x 8 RAM using 256K x 1 RAM chips
Strategy
- Use eight 256 x 1 RAM in one row.
- Connect the input CS, RWS, A, to the CS, RWS, A of each 256 x 1 RAM.
- Combine all inputs of eight 256 x 1 RAM together to serve as input bus, combine all outputs of eight 256 x 1 RAM together to serve as output bus,
Problem 6
Question
(Datapaths) Design a simple datapath that can compute the expression:
aixi
aixi + bi
Strategy
Please reference chapter 7.10 and solution.
Note: Frist we load n to Counter, then count down from n to 0, in the end we check whether the output of counter is 0 in the control part.
Problem 7
Question
(Datapaths) Define and implement the controller for the datapath that couldexecute the algorithm developed in Problem 7.19(a).
Strategy
- Write out the basic algorithm.
- Assign the vaiable to the registers.
- Derive the proper control word for each statement.
- Develop state diagram (FSM representation) for the above algorithm.
- Draw next-state table, write next-state equations.
- Draw output logic table, write output equations.
- Develop logic schematic.