20^th IEEE International Parallel & Distributed
Processing Symposium
April 25-29, 2006
Rhodes Island, Greece

Welcome Getting Started Conference Information Technical Sessions Workshops Book of Abstracts Author Index Search Proceedings       Technical Committee on Parallel Processing

Session 3: Memory Systems and Caches   Enhancing L2 Organization for CMPs with a Center Cell Chun Liu, Anand Sivasubramaniam, Mahmut Kandemir, Mary Jane Irwin Improving Cache Locality for Thread-Level Speculation Stanley L. C. Fung, J. Gregory Steffan On the Effectiveness of Speculative and Selective Memory Fences Oliver Trachsel, Christoph Von Praun, Thomas R. Gross Exploiting Locality: A Flexible DSM Approach Håkan Zeffer, Zoran Radovic, Erik Hagersten