RISC - Recoding Infrastructure for SystemC (DRAFT)

Introduction

Risc is an API to process SystemC designs.
The outcome is optimized for simulations on many core architectures.
All at your own risk! (yep, it's a running gag)

Installation

Requirements

Preparation

You have to configure source_me with the corresponding path

Setup

NOTICE!

Please notice that this version is only an early draft! This is a work-in-progress, many changes are expected.

Authors

Rainer Doemer (doemer@uci.edu) Guantao Liu (guantaol@uci.edu) Tim Schmidt (schmidtt@uci.edu)

Copyright (c) 2014 CECS - Center for Embedded Computer Systems University of California, Irvine

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