EECS 31/CSE 31/ICS 151 Syllabus

Course Objective

The goal of this course is to learn the basic principles of digital design. The course aims at enabling a student to design small digital systems for different application starting from abstract executable specifications and referring it to a manufacturable design for the given library of components.

Lecture Format

The lectures are based on videos and slides as well as board work. The lectures will be mostly based on the material covered in the specified textbook. However, there may be some additional material covered. In order to come to grips with the course, it is essential that you view videos, attend the lectures and ask questions in the class. Since lecture slides and videos are avalable on the internet no handouts of the lectures will be provided.

It is the responsibility of the students to note down any additional material covered in lectures and discussed in class. It is in the best interest of the student to come to class after viewing the relevant videos and reading the relevant chapter(s) of the book. The lecture will be fast paced.

Homework

The student will be given homeworks for practice at home. Discussion sections will demonstrate procedure and results for some of the homework problems.

Evaluation Strategy

The evaluation will be based on the final exam (~50%), two midterms (~20% each; one midterm during Summer Session), and homeworks (~10% total). No alternative test arrangements can be made. Final grade: 90%: A, 80%: B, 70%: C, 60%: D.

Cheating Policy

If you are not already familiar with the department's cheating and plagiarism policies and procedures, read the Cheating Policy document, available from the ICS Undergraduate Student Affairs Office.

Add and Drop Policy

Adding students will depend on class size and TA availability. No adds will be signed after the end of the first week of instruction. Drops may be permitted until the end of the second week of class.

Add/Drop cards will be signed by the instructor in the class.

Tentative Lecture Schedule

Week 1: Introduction to digital systems, binary numbers and arithmetic.

In this week students will learn relationships between software and hardware and different levels of abstraction for representing design. They will also learn about representing numbers in binary representation and how to perform arithmetic with binary numbers.

Week 2: Boolean algebra and Boolean functions.

This is a refresher on knowledge obtained in previous classes with emphasis on Boolean algebra axioms and theorems as well as different forms for describing Boolean functions.

Week 3: Boolean Simplifications and Logic Gates .

Basic techniques for Boolean optimization for performance cost and power. Also in this week students will learn different cost functions for optimization.

Week 4: Digital technology and Technology optimizations.

In this week students will learn how to manipulate and optimize Boolean functions for differnt libraries of logic gates and differnt technologies.

Week 5: Design of RTL combinatorial components: ALU, shifters, comparator, etc.

These lectures teach students how to implement basic programming-language operations such as addition, multiplication, comparison and other more complex functions.

Week 6: Sequential Design.

In this week student learn basic concepts and components of information storage such as latches and flip-flops and how to specify storage components using finite-state-machine(FSM) model.

Week 7: FSM model, analysis and synthesis techniques for sequential and storage components..

In this week student learn basic concepts and components of information storage and techniques for design and optimization of components described by FSM models.

Week 8: Design of RTL storage components: register, memories, register files, RAMs, FIFOs, stacks, etc.

This week students learn how to design component for storing variables and perform simple sequential operations. These lectures are geared toward learning organization and design of storage components intended for storing a variety of data structures found in programming languages.

Week 9: From C to RTL.

Methodology for converting executables to RTL. Step by step explanation of basic tasks of designing datapath and controller components.

Week 10: Processor organization and design.

Design principles for custom hardware units executing fixed code that is specified with FSMD models. Also, techniques for design of standard processors from a given instruction-set (IS). Discussion of IS choice on performance of processor design.