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HISTORY                      RISC V 0.6.3
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Releases, Publications, important changes:
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2014-06-09: Alpha release 0.1.0 (unreliable work-in-progress)
    Basic parsing and representing of SystemC core elements
    Rainer Doemer, Guantao Liu, Tim Schmidt

2014-11-24: Alpha release 0.1.1 (aka Hulk)
    Static read/write analysis of variables in processes
    Rainer Doemer, Guantao Liu, Tim Schmidt

2015-09-30: Alpha release 0.2.0 (open source)
    Integrated compiler and simulator
    -> approx. 61k lines of source code
    Rainer Doemer, Guantao Liu, Tim Schmidt

2015-10-30: Alpha release 0.2.1 (open source)
    Integrated compiler and simulator
    + improved documentation (manual page)
    + improved installation (bin directory, etc.)
    + bug fixes (conflict tables)
    -> approx. 62k lines of source code
    Rainer Doemer, Guantao Liu, Tim Schmidt

2016-08-12: Alpha release 0.2.2 (internal only)
    Integrated compiler and simulator
    + improved installation (and maintenance) scripts
    + initial support for dynamic instance tree
    + bug fixes
    -> approx. 79k lines of source code
    Rainer Doemer, Guantao Liu, Tim Schmidt

2016-09-30: Beta release 0.3.0 (open source)
    Integrated compiler and simulator, new dynamic elaborator
    + improved installation, build, and maintenance setup
    + new support for dynamic conflict analysis: RISC elaborator 'elab'
    + new support for annotation of library functions (#pragma risc)
    + new support for the Intel compiler in the backend
    + new demo example mandelbrot_fifo.cpp (using SystemC sc_fifo)
    + new parallel benchmarks fibo.cpp, fmul.cpp (extreme parallelism)
    + safe support for primitive channels with update methods
    + bug fixes
    -> approx. 80k lines of source code
    Rainer Doemer, Guantao Liu, Tim Schmidt

2017-05-05: Beta release 0.3.1 (internal only)
    Integrated compiler and simulator, with dynamic elaborator
    + improved installation script (with minimal BOOST library)
    + out-of-order execution with prediction
    + new regression test suite for simulation (SEQ, SYN, NPD, OOO)
    + bug fixes
    -> approx. 102k lines of source code
    Zhongqi Cheng, Rainer Doemer, Guantao Liu, Tim Schmidt

2017-07-31: Release 0.4.0 (open source)
    Integrated compiler and simulator, with SIMD vectorization
    + new support for SIMD parallelism: RISC SIMD advisor 'simd'
    + new SIMD vectorization demo mandelbrot_icpc_demo (using Intel compiler)
    + more precise port mapping analysis leading to less false conflicts        
    + more precise prediction analysis due to cloning of channel segments
    + improved segment ID instrumentation via thread-local data
    + performance testing for regression, parallel, and demo examples
    + improved documentation, logging information, and error handling
    + bug fixes
    -> approx. 111k lines of source code
    Zhongqi Cheng, Rainer Doemer, Guantao Liu, Tim Schmidt

2018-04-19: Release 0.4.1 (internal only)
    Integrated compiler and simulator with supporting tools
    + new port-call-path based analysis (DATE'18 paper), less false conflicts
    + new analysis for reference variables, less false conflicts
    + new light-weight SystemC headers for faster compilation (CECS-TR-16-07)
    + new hierarchy visualization tools 'visual' and 'tree' (CECS-TR-17-06)
    + support for 6 styles of port binding (removes limitation 3 of v.0.4.0)
    + support for SystemC tracing (sc_trace) facilities
    + bug fix: unused modules can be present in design models
    + bug fixes
    -> approx. 147k lines of source code
    Farah Arabi, Zhongqi Cheng, Rainer Doemer, Guantao Liu, Daniel Mendoza,
    Tim Schmidt

2018-06-15: Release 0.4.2 (open-source)
    Integrated compiler and simulator with supporting tools
    + foundation libs upgraded to Boost 1.61 and Rose 0.9.10.25 (2018-05-16)
    + support for CentOS 7.x (in addition to ongoing CentOS 6 support)
    + new binary distribution in Docker container for quick plug-and-play
    + initial support for multiple translation units (Partial Segment Graphs)
    + bug fix: removed obsolete "patching ROSE limitations" step (new Rose)
    + bug fix: DVD player example code is now C++11 compliant
    + bug fix: verbosity logs of RISC compiler (with -v and -vv)
    + bug fixes
    -> approx. 151k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza, Tim Schmidt

2018-09-27 Release 0.4.3 (internal only)
    Integrated compiler and simulator with supporting tools
    + support for Partial Segment Graphs (removes limitation 3 of v.0.4.2)
    + support for multiple translation units, 3rd-party IP without source code
    + support for static analysis of sc_event_and_list and sc_event_or_list
    + improved support for RTL constructs (sc_signal, static sensitivity, etc.)
    + support for simulation in limited time periods (sc_start(duration))
    + improved Segment Graph (SG) visualization in .dot files
    + bug fixes
    -> approx. 162k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza

2018-09-30 Release 0.5.0 (open-source)
    Integrated compiler and simulator with supporting tools
    + extended CECS technical report for features, accuracy and completeness
    -> approx. 162k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza

2019-04-15 Release 0.5.1 (internal only)
    + clean and deterministic segment graphs and data conflict tables
    + removed instrumentation of redundant mutexes in user-defined channels
    + internal time resolution consistent with SystemC standard (1ps)
    + initial support for TLM-2.0 sockets and communication via b_transport()
    + bug fixes
    -> approx. 181k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza

2019-05-16 Release 0.5.2 (internal only)
    + improved accuracy of HTML data conflict tables
    + more flexible port mapping analysis (across hierarchies)
    + support for TLM-2.0 sockets and communication via b_transport()
    + support for TLM-2.0 DMI communication via get_direct_mem_ptr()
    + new DVD player examples modeled with TLM-2.0 coding styles
      (with/without hierarchical binding, interconnect, multiple memories, DMI)
    + improved simulator, resuming multiple waiting threads in parallel
    + improved simulator, replaced event hazards checking with event prediction
    + new simulator diagnostics log (SYSC_VERBOSITY_FLAGs)
    + new script min_data_conflict_table.sh for compiler diagnostics
    + new visualization of socket connectivity and thread location (visual)
    + bug fixes
    -> approx. 187k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza

2019-06-26 Release 0.5.3 (internal only)
    + initial support for socket interconnectivity in 'elab' tool
    + initial support for SC_METHOD, dont_initialize, next_trigger
    + bug fixes
    -> approx. 196k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza

2019-09-30 Release 0.6.0 (open-source)
    + integration with virtual platforms (i.e. Simics VP) for co-simulation
    + new module hierarchy listing tool 'list'
    + new feature for external conflict table files when these are large
    + improved support for sc_max_time(), sc_start(duration), sc_stop()
    + improved support for SC_METHOD (1-to-1 methods-to-invoker ratio)
    + improved simulator speed in out-of-order scheduler (event delivery)
    + improved compatibility with modern compilers (i.e. GNU-C 8.x)
    + improved Doxygen-generated documentation
    + bug fixes
    -> approx. 206k lines of source code
    Zhongqi Cheng, Rainer Doemer, Spencer Kam, Daniel Mendoza

2020-02-27 Release 0.6.1 (internal only)
    + new feature "scheduler bypass" for improved simulator speed (DATE'20)
    + new data structure "defining trees" for lazy event prediction (DATE'20)
    + removed obsolete event notification table (indirect dependencies)
    + support for SC_METHOD with next_trigger()
    + support for immediate notifications of events (with warning)
    + support for timed notifications of events (delivered at a later time)
    + configurable number of SC_method invoker threads (SYSC_NUM_INVOKERS)
    + improved and extended regression tests
    + bug fix for 'visual' tool (broken port connectivity)
    + bug fixes
    -> approx. 221k lines of source code
    Zhongqi Cheng, Rainer Doemer, Daniel Mendoza

2020-09-13 Release 0.6.2 (open-source)
    + new tool 'sysdot' to interactively visualize segment graphs and conflicts
    + new support for 'wait(sc_inport.value_changed_event())'
      (removes ASSERTION WARNING: Neither sc_event, nor sc_event_list!)
    + bug fixes
    -> approx. 228k lines of source code
    Zhongqi Cheng, Rainer Doemer, Aditya Harit

2021-08-18 Release 0.6.3 (open-source)
    + new tool 'flatten' to create a single file from multi-file SystemC source
    + new demo examples play_TLM2_membuf with FIFO buffer in shared memory
      (with interrupt/event or polling synchronization)
    + bug fixes
    -> approx. 230k lines of source code
    Rainer Doemer, Vivek Govindasamy, Yutong Wang

August 2021.

Future work:
    + full support for cycle-accurate models (RTL and HLS abstraction)
    + support for grouping of SC_METHODs for efficient parallel execution

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