Journal Articles

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Prabhat Mishra, Nikil Dutt: Specification-driven directed test generation for validation of pipelined processors. ACM Trans. Design Autom. Electr. Syst. (TODAES) 13(3) (2008)


ACM Transactions on Embedded Computer Systems (TECS)

Minyoung Kim, Sudarshan Banerjee, Nikil Dutt, Nalini Venkatasubramanian: Energy-aware cosynthesis of real-time multimedia applications on MPSoCs using heterogeneous scheduling policies. ACM Trans. Embedded Comput. Syst. (TECS) 7(2) (2008)

Jelena Trajkovic, Alexander V. Veidenbaum, Arun Kejariwal: Improving SDRAM access energy efficiency for low-power embedded systems. ACM Trans. Embedded Comput. Syst. 7(3): (2008)

Sudeep Pasricha, Nikil Dutt, Mohamed Ben-Romdhane: Fast exploration of bus-based communication architectures at the CCATB abstraction. ACM Trans. Embedded Comput. Syst. (TECS) 7(2) (2008)

Gunar Schirner, Rainer Dömer: Quantitative analysis of the speed/accuracy trade-off in transaction level modeling. ACM Trans. Embedded Comput. Syst. 8(1): (2008)


IEEE Transactions on Circuits and Systems (TCAS)

Fred Tzeng, Amin Jahanian, Payam Heydari: A Multiband Inductor-Reuse CMOS Low-Noise Amplifier. IEEE Trans. on Circuits and Systems 55-II(3): 209-213 (2008)


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)

Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozorgzadeh: Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration. IEEE Trans. on CAD of Integrated Circuits and Systems (TCAD) 27(3):409-422 (2008)

Pramod Chandraiah, Rainer Dömer: Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1078-1090 (2008)

Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie:Register File Power Reduction Using Bypass Sensitive Compiler. IEEE Trans. on CAD of Integrated Circuits and Systems (TCAD) 27(6):1155-1159 (2008)

Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil D. Dutt: Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications. IEEE Trans. on CAD of Integrated Circuits and Systems (TCAD) 27(8):1439-1452 (2008)


IEEE Transactions on Computers (TC)

Jung-Yup Kang, Sandeep K. Gupta, Jean-Luc Gaudiot: An Efficient Data-Distribution Mechanism in a Processor-In-Memory (PIM) Architecture Applied to Motion Estimation. IEEE Trans. Computers 57(3): 375-388 (2008)

Wan-Chen Lu, Kwei-Jay Lin, Hsin-Wen Wei, Wei Kuan Shih: Efficient Exact Test for Rate-Monotonic Schedulability Using Large Period-Dependent Initial Values. IEEE Trans. Computers 57(5): 648-659 (2008)


Journal of Systems Architecture – Embedded Systems Design (JSA)

Won Woo Ro, Jean-Luc Gaudiot: A low-complexity microprocessor design with speculative pre-execution. Journal of Systems Architecture – Embedded Systems Design 54(12): 1101-1112 (2008)

Juan L. Aragón, Alexander V. Veidenbaum: Optimizing CAM-based instruction cache designs for low-power embedded systems. Journal of Systems Architecture – Embedded Systems Design 54(12): 1155-1163 (2008)


Information Systems and E-Business Management (IS & EM)

Yan Wang, Duncan S. Wong, Kwei-Jay Lin, Vijay Varadharajan: Evaluating transaction trust and risk levels in peer-to-peer e-commerce environments. Inf. Syst. E-Business Management 6(1): 25-48 (2008)


Information Processing Letters (IPL)

Yi-Hsiung Chao, Shun-Shii Lin, Kwei-Jay Lin: Schedulability issues for EDZL scheduling on real-time multiprocessor systems. Inf. Process. Lett. 107(5): 158-164 (2008)


International Journal of Parallel Programming (IJPP)

Ilya Issenin, Nikil Dutt: Using FORAY Models to Enable MPSoC Memory Optimizations. International Journal of Parallel Programming (IJPP) 36(1):93-113 (2008)

Dongsoo Kang, Chen Liu, Jean-Luc Gaudiot: The Impact of Speculative Execution on SMT Processors. International Journal of Parallel Programming 36(4): 361-385 (2008)

Tony Givargis: Guest Editor Introduction: Special Issue on Embedded Processors. International Journal of Parallel Programming (IJPP) 36(5):455-456 (2008)

Hsiao-Hsi Wang, Kuan-Ching Li, Ssu-Hsuan Lu, Chun-Chieh Yang, Jean-Luc Gaudiot: Design and Implementation of an Agent Home Scheme Strategy for Prefetch-Based DSM Systems. International Journal of Parallel Programming 36(6): 521-542 (2008)


Image and Vision Computing

Weisheng Duan, Falko Kuester, Jean-Luc Gaudiot, Omar Hammami: Automatic object and image alignment using Fourier Descriptors. Image Vision Comput. 26(9): 1196-1206 (2008)

International Journal of Embedded Systems (IJES)

Jong-eun Lee, Kiyoung Choi, Nikil Dutt: Evaluating memory architectures for media applications on Coarse-grained Reconfigurable Architectures. IJES 3(3):119-127 (2008)

José Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum: A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. IJES 3(4): 285-293 (2008)


IEICE Transactions

Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara: Scheduling Power-Constrained Tests through the SoC Functional Bus. IEICE Transactions 91-D(3): 736-746 (2008)


IEEE Internet Computing

Kwei-Jay Lin: E-Commerce Technology: Back to a Prominent Future. IEEE Internet Computing 12(1): 60-65 (2008)

Yan Wang, Kwei-Jay Lin: Reputation-Oriented Trustworthy Computing in E-Commerce Environments. IEEE Internet Computing 12(4): 55-59 (2008)


EURASIP Journal on Embedded Systems (EJES)

Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski: System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. EURASIP J. Emb. Sys. (EJES) 2008 (2008)


IEEE Design & Test of Computer (IEEE D&ToC)

Rajesh Gupta, Arvind, Gérard Berry, Forrest Brewer: Advances in ESL Design. IEEE Design & Test of Computers 25(6): 520-526 (2008)


IEEE Computer

Frank Vahid, Greg Stitt, Roman L. Lysecky: Warp Processing: Dynamic Translation of Binaries to FPGA Circuits. IEEE Computer 41(7): 40-46 (2008)