BEGIN:VCALENDAR
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PRODID:-//CECS - ECPv6.18.4//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
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X-WR-CALDESC:Events for CECS
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
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TZID:America/Los_Angeles
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TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20210314T100000
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TZOFFSETFROM:-0700
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TZNAME:PST
DTSTART:20211107T090000
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TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20220313T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20221106T090000
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BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20230312T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20231105T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20220802T140000
DTEND;TZID=America/Los_Angeles:20220802T150000
DTSTAMP:20231011T032348Z
CREATED:20231011T032346Z
LAST-MODIFIED:20231011T032348Z
UID:14138-1659448800-1659452400@www.cecs.uci.edu
SUMMARY:“Securing Hardware for Designing Trustworthy Systems”
DESCRIPTION:Speaker: Prabhat Mishra\nDate and Time: Tuesday\, August 2\, 2:00 pm \nLocation: DBH 4011 OR Zoom Link \nAbstract: \nSystem-on-Chip (SoC) is the brain behind computing and communication in a wide variety of embedded systems. Reusable hardware Intellectual Property (IP) based SoC design has emerged as a pervasive design practice in the industry to dramatically reduce SoC design and verification cost while meeting aggressive time-to-market constraints. Growing reliance on these pre-verified hardware IPs\, often gathered from untrusted third-party vendors\, severely affects the security and trustworthiness of computing platforms. It is crucial to evaluate the integrity and trustworthiness of third-party IPs for designing trustworthy systems. In this talk\, I will introduce a wide variety of hardware security vulnerabilities\, design-for-security solutions\, and possible attacks and countermeasures. I will briefly describe how the complementary abilities of simulation-based validation\, formal verification as well as side channel analysis can be effectively utilized for comprehensive SoC security and trust validation. \nBiography: \nPrabhat Mishra is a Professor in the Department of Computer and Information Science and Engineering and a UF Research Foundation Professor at the University of Florida. He received his Ph.D. in Computer Science from the University of California at Irvine in 2004. His research interests include embedded and cyber-physical systems\, hardware security and trust\, energy-aware computing\, system-on-chip validation\, machine learning\, and quantum computing. He has published 8 books\, 35 book chapters\, and more than 200 research articles in premier international journals and conferences. His research has been recognized by several awards including the NSF CAREER Award\, IBM Faculty Award\, three best paper awards\, and EDAA Outstanding Dissertation Award. He currently serves as an Associate Editor of IEEE Transactions on VLSI Systems and ACM Transactions on Embedded Computing Systems. He is an IEEE Fellow and an ACM Distinguished Scientist. \nHosted By: Prof. Nikil Dutt \n 
URL:https://www.cecs.uci.edu/event/securing-hardware-for-designing-trustworthy-systems/
LOCATION:DBH 4011\, Donald Bren Hall\, University of California\, Irvine\, Irvine\, CA\, 92617\, United States
CATEGORIES:Seminars at CECS
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DTSTART;TZID=America/Los_Angeles:20220810T110000
DTEND;TZID=America/Los_Angeles:20220810T120000
DTSTAMP:20231011T032348Z
CREATED:20231011T032346Z
LAST-MODIFIED:20231011T032348Z
UID:14139-1660129200-1660132800@www.cecs.uci.edu
SUMMARY:"DRAC: Designing RISC-V-based Accelerators for next generation Computers"
DESCRIPTION:Speaker: Miquel Moreto\nDate and Time: Wednesday\, August 10\, 11:00 am \nLocation: DBH 3011 OR Zoom Link \nAbstract: \nDesigning RISC-V-based Accelerators for next-generation Computers (DRAC) is a 3-year project (2019-2022) funded by the ERDF Operational Program of Catalonia 2014-2020. DRAC will design\, verify\, implement and fabricate a high-performance general purpose processor that will incorporate different accelerators based on the RISC-V technology\, with specific applications in the field of post-quantum security\, genomics\, and autonomous navigation. In this talk\, we will provide an overview of the main achievements in the DRAC project\, including the fabrication of Lagarto\, the first RISC-V processor developed in Spain. \nBiography: \nMiquel Moreto is a Ramon y Cajal Fellow at the Computer Architecture Departament (DAC) at the Universitat Politècnica de Catalunya (UPC)\, and he leads the High Performance Domain Specific Architectures team at the Barcelona Supercomputing Center (BSC). Miquel received his Ph.D. from UPC in 2010. After finishing the PhD\, he spent 15 months at the International Computer Science Institute (ICSI)\, affiliated with UC Berkeley\, as a Fulbright Postdoctoral Research Fellowship Holder during 2011 and 2012. In 2013\, he returned to Barcelona to work on multiple European projects (RoMoL\, Mont-Blanc\, EPI\, DeepHealth\, eProcessor) and industrial projects (Arm\, IBM\, Lenovo). In 2019\, he led the design and fabrication of Lagarto\, the first processor developed in Spain based on the open source RISC-V instruction set architecture. Currently\, he coordinates the DRAC project\, which is promoting the Lagarto initiative with new generations of the Lagarto processor and accelerators. \nHosted By: Prof. Veidenbaum \n 
URL:https://www.cecs.uci.edu/event/drac-designing-risc-v-based-accelerators-for-next-generation-computers/
LOCATION:DBH 3011\, Donald Bren Hall University of California\, Irve\, Irvine\, CA\, 92617\, United States
CATEGORIES:Seminars at CECS
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DTSTART;TZID=America/Los_Angeles:20220817T103000
DTEND;TZID=America/Los_Angeles:20220817T113000
DTSTAMP:20231011T032408Z
CREATED:20231011T032408Z
LAST-MODIFIED:20231011T032408Z
UID:14153-1660732200-1660735800@www.cecs.uci.edu
SUMMARY:An End-to-End Platform for Multi-Modal Machine Learning Affective Computing Services
DESCRIPTION:Name: Emad Kasaeyan Naeini \nChair: Nikil Dutt \nDate: August 17\, 2022 \nTime: 10:30 AM \nLocation: DBH 3011 \nCommittee: Amir Rahmani\, Fadi Kurdahi \nTitle:  An End-to-End Platform for Multi-Modal Machine Learning Affective Computing Services \nAbstract: \nSmart affective computing applications deliberately influence pain\, emotion and other affective phenomena\, and are fundamental to human experience\, health and well-being. Affective states such as pain\, stress\, and emotion are intrinsically subjective in nature\, posing challenges for objective assessment and quantification of such affective phenomena. Prior efforts in affective computing provide a foundation for the automated analysis of affective states\, but still face challenges in real-life\, everyday settings. We use pain as an exemplar for affective computing services. Pain assessment is critical for optimal treatment\, and is particularly important during periods of acute pain since inadequately treated acute pain increases the risk of chronic pain. Historically\, patients have served as the main assessment tool as they are able to self-report their pain presence and severity on standard\, but somewhat subjective pain scales. However\, it remains a challenge to assess pain from patients who cannot self-report. Automatic pain recognition systems could be crucial to facilitating accurate\, objective\, and real-time pain measurement\, that can in turn improve pain management and ultimately lead to improved patient outcomes. Using pain as an exemplar of smart affective computing services\, this thesis proposes the use of multimodal sensing of physiological and behavioral input data\, transmits the data to edge and/or cloud nodes\, and processes data with compute-intensive machine learning (ML) algorithms. The efficiency of ML-driven applications for affective computing (e.g.\, pain assessment) is greatly affected by run-time variations resulting from continuous stream of noisy input data\, unreliable network connections\, and the variations in computational requirements of ML algorithms. Towards that end\, this thesis evaluates and automates objective and real-time multimodal pain assessment algorithms\, and performs design space exploration of accuracy-performance-energy trade-offs and sense-compute co-optimization for multimodal machine learning (MMML) methods. The approach developed in this thesis could be used for the design and development of an end-to-end platform for multimodal machine learning affective computing services\, together with a thorough analysis of their roles in the prediction\, performance and energy in future studies. \nShort bio: \nEmad Kasaeyan Naeini is a Ph.D. candidate in Computer Engineering at the University of California\, Irvine. He received his M.Sc. degree in Electrical and Computer Engineering from the Department of Electrical Engineering and Computer Science at the University of California Irvine in 2020 and his B.Sc. in Electrical Engineering from Sharif University of Technology\, Tehran\, Iran\, in 2017. His research interests primarily include deep learning and machine learning\, signal processing\, healthcare Internet of Things (IoT)\, and healthcare data analysis.
URL:https://www.cecs.uci.edu/event/an-end-to-end-platform-for-multi-modal-machine-learning-affective-computing-services/
LOCATION:DBH 3011\, Donald Bren Hall University of California\, Irve\, Irvine\, CA\, 92617\, United States
CATEGORIES:PhD Defenses
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