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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160929T150000
DTEND;TZID=America/Los_Angeles:20160929T160000
DTSTAMP:20231011T190555Z
CREATED:20231011T190554Z
LAST-MODIFIED:20231011T190555Z
UID:14451-1475161200-1475164800@www.cecs.uci.edu
SUMMARY:Circuits and Systems Seminar Series
DESCRIPTION:Title: “Adaptive Design: Tackling Variability Challenges in VLSI Circuits”\nSpeaker: Prof Mingoo Seok\, Columbia University\, New York\, NY \nDate and Time: Friday\, April 22\, 2016 at 3:00 P.M. – 4:00 P.M. \nLocation: Engineering Hall 2430 \nHosts: Professor Payam Heydari \nAbstract: In this talk\, we will discuss variability challenges in VLSI systems and our recent research efforts on variation-adaptive design techniques. Variability in supply voltage\, chip temperature\, manufacturing process\, and transistor aging have imposed a large amount of pessimistic margins in clock frequency\, voltage\, and device size\, which has severely undermined gains from various boundary-pushing efforts. We will present (1) a low-overhead\, in-sit\, within-a-cycle timing-error detection and correction technique that can operate at near/sub-threshold voltage\, (2) ultra-compact thermal sensor circuits enabling 10-100X denser on-chip thermal sensing\, (3) self-testing circuits and frameworks for in-field & in-sit aging monitoring in pipeline and SRAM register files. Several test chip measurement results will be presented. \nBio: Mingoo Seok is an assistant professor in the Department of Electrical Engineering at Columbia University. He received the BS (with summa cum laude) in electrical engineering from Seoul National University\, South Korea\, in 2005\, and the MS and PhD degree from University of Michigan in 2007 and 2011\, respectively\, all in electrical engineering. He was a member of technical staff in Texas Instruments\, Dallas in 2011. He joined Columbia University in 2012. His research interests are various aspects of computing systems\, including ultra-low-power computing systems\, computing systems for machine learning\, adaptive circuits and architecture\, and non-conventional computing systems. He received 1999 Distinguished Undergraduate Scholarship from the Korea Foundation for Advanced Studies\, 2005 Doctoral Fellowship from the same organization\, and 2008 Rackham Pre-Doctoral Fellowship from University of Michigan. He also won 2009 AMD/CICC Scholarship Award for picowatt voltage reference work and 2009 DAC/ISSCC Design Contest for the 35pW sensor platform design. He won 2015 NSF CAREER award. He has been serving as an associate editor for IEEE Transactions on Circuits and Systems I since 2013\, and IEEE Transactions on VLSI Systems since 2015. \nView Details Here
URL:https://www.cecs.uci.edu/event/circuits-and-systems-seminar-series/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160929T150000
DTEND;TZID=America/Los_Angeles:20160929T160000
DTSTAMP:20231011T190555Z
CREATED:20231011T190553Z
LAST-MODIFIED:20231011T190555Z
UID:14450-1475161200-1475164800@www.cecs.uci.edu
SUMMARY:CECS Hosts IWCR 2016
DESCRIPTION:View details here
URL:https://www.cecs.uci.edu/event/cecs-hosts-iwcr-2016/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160929T150000
DTEND;TZID=America/Los_Angeles:20160929T160000
DTSTAMP:20231011T190308Z
CREATED:20231011T190308Z
LAST-MODIFIED:20231011T190308Z
UID:14391-1475161200-1475164800@www.cecs.uci.edu
SUMMARY:Building Fake Body Parts: Real-Time Digital Mockups of Physiological Systems
DESCRIPTION:Title:  Building Fake Body Parts: Real-Time Digital Mockups of Physiological SystemsSpeaker: Prof. Frank Vahid\, University of California\, Riverside\nLocation: 6011 Donald Bren Hall\nDate/Time: Friday\, October 26\, 2012\, 11:00am – 12:00pm\nHost: Prof. Eli Bozorgzadeh \nAbstract: Designing computer-based medical devices like pacemakers or ventilators is hard\, in part because testing can’t be done on real humans. PC-based simulations are slow and inaccurate. Using physical mockups\, like connecting a ventilator device to a balloon acting as a lung\, can’t support sufficiently diverse scenarios\, like fluid in the lungs. This talk describes joint UCR/UCI work on developing “digital mockups” — models of physiological systems that execute in real-time\, supporting thorough testing of device software. We show that FPGAs (field-programmable gate arrays) — widely-available programmable chips having a unique execution approach that we’ll describe — are an excellent match for executing physiological models\, yielding order-of-magnitude speedups over PCs\, GPUs\, and other computing approaches. The talk describes the synthesis approach to automatically converting models\, consisting of thousands of differential equations\, into networks of processing elements on FPGAs. Real-time execution of physiological models can also be useful in building complete human simulators\, used today medical and nursing schools. More broadly\, real-time execution of physical systems (chemical\, biological\, mechanical\, physiological\, etc.) can be useful in the design of a wide variety of what today are called cyber-physical systems– systems where computers interact closely with the physical world – including automobiles\, aircraft\, medical equipment\, military equipment\, manufacturing systems\, and much more. \nBio: Frank Vahid is a Professor of Computer Science and Engineering at the University of California\, Riverside (B.S. 1988 Univ. of Illinois in 1988\, M.S./Ph.D. 1990/1994 Univ.of California\, Irvine. He is author of several textbooks on embedded systems and digital design. His current research interests include creating technologies for cyber-physical systems (http://www.cs.ucr.edu/~vahid/digitalmockups/)\, developing customizable assistive monitoring systems for home-alone aging/disabled persons and their caretakers http://www.cs.ucr.edu/~vahid/assistivemonitoring/\, and creating the next generation of online interactive animated learning material (http://pcpp.zyante.com).\nView Details Here
URL:https://www.cecs.uci.edu/event/building-fake-body-parts-real-time-digital-mockups-of-physiological-systems/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160928T150000
DTEND;TZID=America/Los_Angeles:20160928T160000
DTSTAMP:20231011T190616Z
CREATED:20231011T190616Z
LAST-MODIFIED:20231011T190616Z
UID:14471-1475074800-1475078400@www.cecs.uci.edu
SUMMARY:Distinguished Lecture at CECS
DESCRIPTION:Speaker: Prof. Massimo Poncino\, Polytechnic University of Turin\, Italy\nTitle: Towards Computer-Aided Design of Electrical Energy Systems:Challenges and Solutions\nDate: Friday\, April 22\, 2016\nTime: 11:00am – 12:00pm\nLocation: Engineering Hall 2430 \nHost: Prof. Mohammad Al Faruque \n\nView Details Here
URL:https://www.cecs.uci.edu/event/distinguished-lecture-at-cecs-2/
LOCATION:CA
CATEGORIES:Other Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160818T150000
DTEND;TZID=America/Los_Angeles:20160818T160000
DTSTAMP:20231011T190555Z
CREATED:20231011T190553Z
LAST-MODIFIED:20231011T190555Z
UID:14449-1471532400-1471536000@www.cecs.uci.edu
SUMMARY:PhD Defense:
DESCRIPTION:Name:  Aras Pirbadian\nDate: August 29\, 2016 \nTime: 3:30pm \nLocation:  EH 3403 \nCommittee: Ahmed Eltawil (Chair)\, Fadi Kurdahi\, Rainer Doemer \nWith the continued scaling of chip manufacturing technologies\, the significance of process variation in performance of the systems is increasing. Specifically\, process variation results in growing voltage and frequency overhead margins required to ensure error free operation of circuits. However\, the traditional practice of overdesigning the systems to cover process variation is no longer an efficient design methodology in an age with high demands for processing power and limited energy supplies. In this dissertation\, a novel analytical model is proposed to predict the required margin accurately in the early stages of design space exploration. The model can be used to optimize the system overhead in error free calculations or to release the bound by full correctness in error tolerant parts of systems and optimize the energy vs. performance trade-off. Additionally\, this model also considers the statistics of the inputs of the circuit as compared to other existing efforts enabling it to achieve close predictions of full circuit simulation results in a short time. This model is finally used in an adaptive carry select/ripple carry adder configuration to demonstrate the potential achievable power savings. \nGrowing variation in newer technology nodes is not always a negative side effect. The increased inherent randomness in the process manufacturing technology can be utilized to develop unique physically unclonable functions (PUFs). These functions are irreproducible hardware-based authenticating systems\, which do not require memory-based storage. A low overhead delay-based PUF using the variation of the silicon manufacturing is also proposed in the second part of this work. The proposed PUF uses a simple and efficient structure to convert the randomness of the manufacturing process into random responses to fixed challenges in identically designed circuits.
URL:https://www.cecs.uci.edu/event/phd-defense/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160804T150000
DTEND;TZID=America/Los_Angeles:20160804T160000
DTSTAMP:20231011T190537Z
CREATED:20231011T190537Z
LAST-MODIFIED:20231011T190537Z
UID:14448-1470322800-1470326400@www.cecs.uci.edu
SUMMARY:Progression and Edge Intelligence Framework for IoT Systems
DESCRIPTION:Name:  Zhenqiu Huang\nDate: July 29\, 2016 \nTime: 10:00am \nLocation:  EH 4106 \nCommittee: Kwei-Jay Lin (Chair)\, Fadi Kurdahi\, Mohammad Al Faruque \nAbstract: This thesis studies the issues on building and managing future Internet of Things (IoT)\nsystems. IoT systems consist of distributed components with services for sensing\, processing\,\nand controlling through devices deployed in our living environment as part of the global\ncyber-physical ecosystem. \nSystems with perpetually running IoT devices may use a lot of energy. One challenge is to\nimplement good management policies for energy saving. In addition\, a large scale of devices\nmay be deployed in wide geographical areas through low bandwidth wireless communication\nnetworks. This brings the challenge of con
URL:https://www.cecs.uci.edu/event/progression-and-edge-intelligence-framework-for-iot-systems/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160715T150000
DTEND;TZID=America/Los_Angeles:20160715T160000
DTSTAMP:20231011T190537Z
CREATED:20231011T190537Z
LAST-MODIFIED:20231011T190537Z
UID:14447-1468594800-1468598400@www.cecs.uci.edu
SUMMARY:Area/speed tradeoffs in a retargetable FPGA-optimized processor core
DESCRIPTION:Speaker:  Marco Zec\, University of Zagreb \nTitle:  “Area/speed tradeoffs in a retargetable FPGA-optimized processor core” \nDate:  Friday\, July 15\, 2016 \nTime:  11:00 AM \nLocation:  CECS Conference Room (Engineering Hall 3206) \nHost:  Prof. Daniel Gajski \nAbstract: Can portable yet efficient\, FPGA-optimized processor cores be constructed using generic HDL\, without depending on any vendor-specific primitives?  In this talk we will discuss the techniques applied for achieving a balance between instruction throughput and FPGA resource utilization in a synthesizable scalar core which outperforms its proprietary counterparts (MicroBlaze\, Nios\, Cortex-M3) by 20% to 40% in industry-standard integer benchmarks (CoreMark\, Dhrystone per MHz) while\noccupying less than 1000 6-input LUTs\, and less than 650 LUTs in an area-optimized configuration.  The core can be retargeted to execute subsets of either the emerging RISC-V or the traditional MIPS instruction sets\, and is supported by contemporary GNU-based software toolchains.\n \nBio: Marko Zec received a BSc in electrical engineering from the University of Zagreb\, where since 2005. he has been working as a project scientist on various computer networks projects with funding from ICSI Berkeley\, the FreeBSD foundation\, Boeing Integrated Defense Systems\, and Ericsson. His research interests include operating systems\, computer networks\, software-based packet processing datapaths\, and programmable logic. \nView Details
URL:https://www.cecs.uci.edu/event/area-speed-tradeoffs-in-a-retargetable-fpga-optimized-processor-core/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160422T150000
DTEND;TZID=America/Los_Angeles:20160422T160000
DTSTAMP:20231011T190555Z
CREATED:20231011T190554Z
LAST-MODIFIED:20231011T190555Z
UID:14452-1461337200-1461340800@www.cecs.uci.edu
SUMMARY:"Towards Computer-Aided Design of Electrical Energy Systems: Challenges and Solutions"
DESCRIPTION:Title: “Towards Computer-Aided Design of Electrical Energy Systems: Challenges and Solutions”\nSpeaker: Professor Massimo Poncino\, Polytechnic University of Turin\, Italy \nDate and Time: Friday\, April 22\, 2016 at 11:00 A.M. – 12:00 P.M. \nLocation: Engineering Hall 2430 \nHosts: Professor Mohammad Al Faruque \nAbstract: Electrical energy systems (EESs) include energy generation\, distribution\, storage\, and consumption\, and involve many diverse components and sub-systems to implement these tasks. In this talk we discuss fundamental concepts towards a first attempt in applying EDA design methodologies that are widely used for electronics systems design to the case of the design of EESs. CAD for EESs encompasses modeling\, simulation\, design and optimization and is a challenging task that mandates a multidisciplinary and heterogeneous approach. We identify similarities and differences between electrical energy systems and electronics systems in order to inherit as much as possible the profound legacy resources of EDA. The talk analyzes in deeper details the issue of representation\, modeling\, and simulation of EESs\, tasks that naturally precede synthesis and optimization in a typical design flow.\n\n\n\n\n\nBio: Massimo Poncino is Full Professor of Computing Systems at Politecnico di Torino. Prior to that\,\nhe was an Associate Professor (from 2004 to 2006) at Politecnico di Torino\, Associate Professor (from 2001 to 2004) at Università di Verona\, and Assistant Professor (from 1995 to 2001) at Politecnico di Torino. From 1993 to 1994 he was a Visiting Scientist at the Department of Electrical and Computer Engineering of the University of Colorado\, Boulder\, USA. He holds a Dr. Eng. degree in Electrical Engineering (1989) and a PhD degree in Computer Engineering\, both from Politecnico di Torino (1993).His research interests include the design automation of digital systems\, with emphasis on low\n-power embedded systems\, modeling and the simulation of systems -on- chip\, and automatic synthesis of digital systems. He has coauthored more than 300 publications in the above areas\, including one book on energy -efficient memory design. Massimo Poncino has served as member of Technical Program Committee of more than 50 IEEE and ACM conferences. He was the Technical Program Chair of the 2011 IEEE/ACM Symposium on Low-Power Electronics and Design and General co-Chair for the same conference in 2012. He has served in the Editorial Board of the IEEE Transactions on CAD from 2006 to 2011\, and is currently serving in the Editorial Board of IEEE Design & Test and ACM Transactions on Design Automation of Electronic Systems (TODAES). Prof. Poncino is a Senior Member of IEEE\, member of the ACM SIGDA Low -Power Technical Committee\, and a Member the Circuit and Systems Society.\n\nView Details Here
URL:https://www.cecs.uci.edu/event/towards-computer-aided-design-of-electrical-energy-systems-challenges-and-solutions/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160404T150000
DTEND;TZID=America/Los_Angeles:20160404T160000
DTSTAMP:20231011T190536Z
CREATED:20231011T190536Z
LAST-MODIFIED:20231011T190536Z
UID:14445-1459782000-1459785600@www.cecs.uci.edu
SUMMARY:Power Optimization for Medical Sensing Systems
DESCRIPTION:Name:  Jun Luan\nLocation:  EH 4106 \nDate: February 24\, 2016 \nTime: 1:00pm \nCommittee: Pai Chou (Chair)\, Mohammad Al Faruque\, Fadi Kurdahi \nAbstract:  \nMedical sensing systems collect and analyze the patients’ physiological data for monitoring\, aid or diagnostic purposes. System designers are faced with stringent requirements on not only correctness and safety but also power. Reference designs and multi-purpose platforms help to significantly shorten the development cycle. \nThis work takes a cross-layer\, system-level\, platform-based approach to addressing the problem of saving power in a class of portable medical system. We propose a low-power medical sensing system that can be used to monitor Electrocardiography (ECG)\, Photo- plethysmogram (PPG)\, and muscle tension. It also includes a hand gesture recognition system to aid mobility-impaired patients. \nWe explore the theory and application of a compressive sensing framework to medical signal processing. A novel compressive sensing-based ECG compression algorithm and a dominant frequency extraction-based PPG heart-rate calculation algorithm are proposed to reduce the system power. The unique combination of hardware structure and software signal-processing algorithms makes low-power design possible. The system test results show that the proposed system is superior to existing works in terms of power consumption and system size.
URL:https://www.cecs.uci.edu/event/power-optimization-for-medical-sensing-systems/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160404T150000
DTEND;TZID=America/Los_Angeles:20160404T160000
DTSTAMP:20231011T190536Z
CREATED:20231011T190536Z
LAST-MODIFIED:20231011T190536Z
UID:14446-1459782000-1459785600@www.cecs.uci.edu
SUMMARY:Frameworks and Algorithms for Wearable Medical Applications
DESCRIPTION:Name:  SeungJae Lee\nDate:  April\, 5\, 2016 \nTime:  3:00p.m. \nLocation:  EH 4106 \nCommittee:  Pai H. Chou (Chair)\, Fadi Kurdahi\, Tony Givargis \nAbstract: \nWearable embedded systems with sensing\, communication\, and computing capabilities have given rise to innovations in e-health and telemedicine in general. The scope of such systems ranges from devices and mobile apps to cloud backend and analysis algorithms\, all of which must be well integrated. To manage the development\, operation\, and evolution of such complex systems\, a framework systematic framework is needed. This dissertation makes contributions in two parts. First is a framework for defining the structure of a wide range of wearable medical applications with modern cloud support. The second part includes several algorithms that can be plugged into this framework for making these systems more efficient in terms of processing performance and data size. We propose a novel QT analysis algorithm that can take advantage of GPU as well as in a server-client environment\, and we show competitive results in terms of both performance and energy consumption with or without parallelization. We also propose ECG compression techniques using trained overcomplete dictionary. After constructing the dictionary through learning process with a given dataset\, the signal can be compressed by sparse estimation using the trained dictionary. We propose reconstructing ECG signal from undersampled data based on compressive sensing framework that can reconstruct the ECG signals precisely from fewer samples so long as the signal is sparse or compressible. Together\, these algorithms operating in the context of our proposed framework validate the effectiveness of our structured approach to the framework for wearable medical application. \n 
URL:https://www.cecs.uci.edu/event/frameworks-and-algorithms-for-wearable-medical-applications/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160218T150000
DTEND;TZID=America/Los_Angeles:20160218T160000
DTSTAMP:20231011T190555Z
CREATED:20231011T190554Z
LAST-MODIFIED:20231011T190555Z
UID:14453-1455807600-1455811200@www.cecs.uci.edu
SUMMARY:Energy-Efficient Capacitance-to-Digital Converters for Low-Energy Sensor Nodes
DESCRIPTION:Title: “Energy-Efficient Capacitance-to-Digital Converters for Low-Energy Sensor Nodes”\nSpeaker: Professor Khaled N. Salama\, King Abdullah\, University of Science and Technology\, Saudi Arabia \nDate and Time: Thursday\, February 18\, 2016 at 11:00 A.M. \nLocation: Engineering Hall 2430 \nHosts: Fadi J. Kurdahi and Ahmed Eltawil \nAbstract: Energy efficiency is a key requirement for wireless sensor nodes\, biomedical implants\, and wearable devices. The energy consumption of the sensor node needs to be minimized to avoid battery replacement\, or even better\, to enable the device to survive on energy harvested from the ambient. Capacitive sensors do not consume static power; thus\, they are attractive from an energy efficiency perspective. In addition\, they can be employed in a wide range of sensing applications\, such as pressure\, humidity\, biological\, and chemical sensing. However\, the capacitive sensor readout circuit—i.e.\, the capacitance-to-digital converter (CDC) —can be the dominant source of energy consumption in the system. Thus\, the development of energy-efficient CDC architectures is crucial to minimizing the energy consumption of capacitive sensor nodes. In the first part of this talk\, we propose several energy -efficient CDC architectures for low-energy sensor nodes. In the second part\, we study the matching properties of small integrated capacitors\, which are an integral component of energy-efficient CDCs. Despite conventional wisdom\, we experimentally illustrate that the mismatch of small capacitors can be directly measured\, and we report experimental mismatch measurements for sub-femtofarad integrated capacitors. We also correct the common misconception that lateral capacitors match better than vertical capacitors\, and we identify the conditions that make one implementation preferable. \nBio: Dr. Salama received his bachelor’s degree with honors from the Electronics and Communications Department at Cairo University in Egypt in 1997\, and his master’s and doctorate degrees from the Electrical Engineering Department at Stanford University in the United States\, in 2000 and 2005 respectively. He was an assistant professor at RPI between 2005 and 2008. He joined King Abdullah University of science and technology (KAUST) in January 2009 and was the electrical engineering founding program chair till August 2011. His work on CMOS sensors for molecular detection has been funded by the National Institutes of Health (NIH) and the Defense Advanced Research Projects Agency (DARPA)\, awarded the Stanford-Berkeley Innovators Challenge Award in biological sciences and was acquired by Lumina Inc in 2008. He is the cofounder of ultrawave labs\, a biomedical imaging company that was recently acquired. He is the co-author of 90 papers and 10 patents on low-power mixed-signal circuits for intelligent fully integrated sensors and non linear electronics specially memristor devices. He is a senior member of IEEE. \nView Details Here
URL:https://www.cecs.uci.edu/event/energy-efficient-capacitance-to-digital-converters-for-low-energy-sensor-nodes/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20160208T150000
DTEND;TZID=America/Los_Angeles:20160208T160000
DTSTAMP:20231011T190600Z
CREATED:20231011T190600Z
LAST-MODIFIED:20231011T190600Z
UID:14459-1454943600-1454947200@www.cecs.uci.edu
SUMMARY:Mitigating BTI-induced Device Degradation: A Circuit and System Persepctive
DESCRIPTION:Title: Mitigating BTI-induced Device Degradation: A Circuit and System Persepctive\nSpeaker: Professor Ing-Chao Lin\, National Cheng Kung University\, Taiwan \nDate and Time: Monday\, February 8\, 2016 at 1:30 P.M. \nLocation: Donald Bren Hall 3011 \nHost: Professor Nikil Dutt \nAbstract: Bias temperature instability which causes a shift in the transistor’s threshold voltage and decreases circuit switching speed has become a major reliability concern. In this talk\, I will introduce the techniques to mitigate device degradation at the circuit and system level\, and provide design guidelines to deal with device degradation. The future trend on device degradation will be introduced as well. \nBiography: Prof. Ing‐Chao Lin received his M.S. degree from Dept. of Computer Science and Information Engineering\, National Taiwan University and Ph.D. degree from Dept. of Computer Science and Engineering\, the Pennsylvania State University 2001 and 2007\, respectively. From 2007 to 2009\, he is a staff R&D engineer in Real Intent Inc.\, CA\, USA\, where he is working on Real Intent’s automatic timing exception verifier. His research interest includes reliable power‐aware system\, electronic design automation\, and computer architecture. He has authored or co‐authored more than 50 scientific papers and is a committee member of many technical conferences. He is a senior member of IEEE and he is thechair of IEEE Tainan Young Professional group. He is the recipient of 2015 Excellent Young Researcher Award by Chinese Institute of Electrical Engineering. He is currently a visiting scholar in Dept. of Electrical and Computer Engineering\, University of California\, Santa Barbara. \n  \nView more details here \n 
URL:https://www.cecs.uci.edu/event/mitigating-bti-induced-device-degradation-a-circuit-and-system-persepctive/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20151110T150000
DTEND;TZID=America/Los_Angeles:20151110T160000
DTSTAMP:20231011T190612Z
CREATED:20231011T190612Z
LAST-MODIFIED:20231011T190612Z
UID:14468-1447167600-1447171200@www.cecs.uci.edu
SUMMARY:Mobile Technology Enabling Frictionless HealthCare
DESCRIPTION:Title: “Mobile Technology Enabling Frictionless HealthCare”\nSpeaker: Aiman Abdel-Malek\, Vice President\, Engineering\, Qualcomm Life\, Founder & CEO\, Frictionless Life Analytics \nDate:  Tuesday\, November 10\, 2015 \nTime:  3:00 p.m. \nLocation:  Engineering Hall 2430 \nHost: Prof. Fadi J. Kurdahi \nAbstract: With Smart mobile devices being the fastest growing consumer platform in history\, it is becoming a huge enabler to new business models that reduce friction in daily life. Aiman will introduce how mobile technology is creating solutions to many of the current healthcare issues and enabling moving care from the hospital to the home. \nBio: Aiman joined Qualcomm Life from General Electric’s Healthcare Division in Sept 2012\, where he served as GM and CTO for the Global Services Technology business\, a $5 billion division of GE healthcare. There he led a global engineering team responsible for the development of software and systems platforms for predictive remote service technology and healthcare operational efficiency and quality applications. Aiman served GE for 25 years; 10 years in R&D helping the development of GE’s first digital x-ray mammography system and digital Ultrasound system. He then moved to GE Transportation to start and manage the first Satellite wireless-based Locomotive Remote Predictive Services business\, which currently runs on over 20\,000 locomotives. Afterward\, he took an expat assignment in the United Kingdom\, as technology managing director for the Pipeline Inspection Services\, a $400 million global business unit of GE Oil and Gas. Aiman’s technical expertise is in the development of vision inspired signal processing algorithms for aerospace\, industrial and medical applications. He earned his PhD in Systems & Biomedical engineering from the University of Southern California\, completing post-doctoral research at UCLA in neurology. He is a senior member of the IEEE and holds over 22 US and international patents. He serves as a member of the Scientific Advisory Board for the Qualcomm-Xprize Tricorder competition. Also\, he served on GE’s Corporate Software Board\, and as an executive leader for the Image & Signal Processing Technology Council for GE Healthcare. Aiman recently founded his own company\, which aims at helping guide California startups & ventures move from “concept” to “scale” in most frictionless path. He is also a Board Advisor to few startups. \nView Details Here\n 
URL:https://www.cecs.uci.edu/event/mobile-technology-enabling-frictionless-healthcare/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150924T150000
DTEND;TZID=America/Los_Angeles:20150924T160000
DTSTAMP:20231011T190600Z
CREATED:20231011T190600Z
LAST-MODIFIED:20231011T190600Z
UID:14460-1443106800-1443110400@www.cecs.uci.edu
SUMMARY:When Lyapunov meets Church\, automated synthesis of complex systems emerges
DESCRIPTION:Title: When Lyapunov meets Church\, automated synthesis of complex systems emerges\nSpeaker: Prof. Majid Zamani\, Technische Universität München\, Germany \nDate: Thursday\, September 24\, 2015 \nTime: 3:30 p.m. \nLocation: Engineering Colloquia Room 2430 \nHost: Faryar Jabbari and Solmaz S. Kia \nAbstract: Software plays a crucial role in many everyday applications. Modern vehicles and\nairplanes\, for instance\, use interacting software and hardware components to control steering\, fuel in\njection\, and airbag deployment. These applications are examples of cyber-­‐physical systems (CPS)\, where software components interact tightly with physical systems. Recent advances in device manufacturing\, computation\, storage\, and networking have made tremendous advances in hardware and systems platforms for CPS. However\, the development of core software controllers that run on these systems is still ad hoc and error-­‐prone. Many CPS applications are safety-­‐critical\, and much of the engineering costs today are consumed with ensuring that software works correctly. In this talk\, I will proposes a transformative design process\, in which the controller code is automatically synthesized from higher-­‐level correctness requirements. Requirements for modern CPS applications go beyond conventional requirements in control theory (stability\, synchronization\, and tracking) and\nbeyond traditional protocol design in computer science. Accordingly\, I will propose unified methodologies for automatic controller synthesis by combining techniques from discrete systems theory from computer science with continuous dynamical systems from control theory. The proposed automated synthesis of correct-­‐by-­‐ construction controllers holds the potential to develop complex yet reliable CPS applications while considerably reducing verification and validation costs.\n\n\nBio: Majid Zamani is an assistant professor in the Department of Electrical and \nComputer Engineering at Technische Universität München where he leads the Hybrid Control Systems Group. He received a Ph.D. degree in Electrical Engineering and an MA degree in Mathematics both from University of California\, Los Angeles in 2012\, an M.Sc. degree in Electrical Engineering from Sharif University of Technology in 2007\, and a B.Sc. degree in Electrical Engineering from Isfahan University of Technology in 2005. From September 2012 to December 2013\, he was a postdoctoral researcher in the Delft Centre for Systems and Control at Delft University of Technology. Between December 2013 and May 2014\, he was an assistant professor at Delft University of Technology.nd RSS). He is the Editor-­‐in-­‐Chief of the Springer journal Autonomous Robots.\n\n\nView Details Here
URL:https://www.cecs.uci.edu/event/when-lyapunov-meets-church-automated-synthesis-of-complex-systems-emerges/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150729T150000
DTEND;TZID=America/Los_Angeles:20150729T160000
DTSTAMP:20231011T190536Z
CREATED:20231011T190536Z
LAST-MODIFIED:20231011T190536Z
UID:14444-1438182000-1438185600@www.cecs.uci.edu
SUMMARY:A Centralized IoT Middleware System for Devices Working Across Application Domains Using Self-descriptive Capability Profile
DESCRIPTION:Name: Chengjia Huo\nLocation: EH 4404 \nDate: September 30\, 2015 \nTime: 1pm \nCommittee: Pai H. Chou (chair)\, Phillip Sheu\, Rainer Doemer \nAbstract: \nThe Internet of Things (IoT) has been receiving growing attention in recent years as the next wave of computing revolution made possible by all types of networks of things (NoTs)\, where devices powered with low-cost\, miniature low-power systems-on-chip (SoC) with computing and communication capabilities\, and are bridged to the Internet with the assistance of gateways. More and more NoT device are designed to provide more than one functionalities to fulfill different requirements from the application domains. We believe that the true power of IoT is that functionalities of devices can work across application domains. In order to reveal the potential of IoT\, the description of a device’s capability needs to represent the functionalities that the device can provide. We discover the previous solutions on describing a device’s capability focus mainly on hiding the vendor-specific interfaces made by different manufacturers\, but they do not reflect different functionalities that a device provides. In this thesis\, the concept of device capability profile is proposed. Different from the previous solutions\, the device capability profile specified in the firmware of a device allows the device to work across different application domains. Together with device capability profile\, a centralized IoT middleware framework\, called rimware\, is proposed. Rimware tracks every device’s capability and state in a centralized manner and provides different ways for application domains to query against the device’s functionalities. In addition\, rimware utilizes the device capability profile to carry out the enforcement of the security and privacy throughout the communication with the devices. Moreover\, tasks can be scheduled through the rimware which enables functionalities from multiple devices to work together to fulfill the requirements from application domains. Optimization is applied on cases that one device working for multiple task simultaneously. An implementation of rimware that is specifically designed for BLE devices\, called BlueRim\, which takes advantages of BLE’s very long battery life on the device side and the cloud functionality on the centralized side is provided. The fundamental features of rimware have been validated in several real-world applications from different different domains while incurring minimal code size and communication overhead on BLE devices. We believe that our approach represents an important technology in taking IoT closer to realizing the full potentials.
URL:https://www.cecs.uci.edu/event/a-centralized-iot-middleware-system-for-devices-working-across-application-domains-using-self-descriptive-capability-profile/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150729T150000
DTEND;TZID=America/Los_Angeles:20150729T160000
DTSTAMP:20231011T190519Z
CREATED:20231011T190518Z
LAST-MODIFIED:20231011T190519Z
UID:14438-1438182000-1438185600@www.cecs.uci.edu
SUMMARY:Flexible-Stretchable-Reconfigurable CMOS Electronics Through Hybrid Integration of Heterogeneous Materials for Wearable Interactive Electronic Systems
DESCRIPTION:Speaker:  Prof. Muhammad Mustafa Hussain\, King Abdullah University of Science and Technology (KAUST) \nTitle:  “Flexible-Stretchable-Reconfigurable CMOS Electronics Through Hybrid Integration of Heterogeneous Materials for Wearable Interactive Electronic Systems” \nDate:  Tuesday\, April 21\, 2015 \nTime:  2:00 PM \nLocation:  Harut Barsamian Colloquia Room (Engineering Hall 2430) \nHost:  Prof. Fadi Kurdahi \nAbstract: Our research is focused on heterogeneous electronic materials and high-performance complementary metal oxide semiconductor (CMOS) based tunable shape-size-conformity wearable interactive electronics and systems for smart living (computation-communication-infotainment) through internet of everything and a sustainable future (healthcare-water-food-environment-security). For scientific exploration\, we make collective use of the materials\, processes and device architecture leveraging multidisciplinary tracks of material science\, bioengineering\, mechanical\, environmental engineering and computer science. As engineering tool\, we use CMOS technology extensively due to its industrial relevance\, maturity and reliability for rapid tech transfer.\nTo bridge between the high-performance state-of-the-art electronics and emerging soft-materials based flexible-stretchable electronics. we have developed various generic batch processes using CMOS technologies to transform any already processed Integrated Circuitry (IC) or arrays of devices to be fabricated on virgin substrates (thin film based\, examples include but not limited to: silicon\, silicon germanium\, indium phosphide\, gallium arsenide\, etc.) into flexible and stretchable one [ACS Nano 2014\, pss-RRL 2014]. These processes are cost effective ($1.25/cm2)\, non-abrasive and retain high-performance\, energy-efficiency\, ultra-large-scale-integration density as obtained in today’s state-of-the-art electronics. Often the transformed fabrics (ultra-thin version of the bulk thin film substrates with pre-fabricated devices) are semi-transparent due to the presence of the process originated vertical channels. As per ITRS 2014 metrics\, the processes are fully scalable down to 2 nm technology node. Using these techniques we have demonstrated high-κ/metal gate based planar and non-planar nano-scale (sub-20 nm) CMOS logic devices [Adv. Mater. 2014 (cover page)\, ACS Nano 2014\, APL 2013\, pss-RRL 2013 (cover pages)\, IEEE TED 2013\, pss-RRL 2013\, Sci. Rep. 2013\, pss-RRL 2013]\, memory [Adv. Electronic Mater. 2015\, Microelect. Engr. 2014]\, micro-scale thermoelectric generators [Small 2013 (frontispiece)]\, micro lithium ion batteries (150 μAh/cm2 normalized capacity)\, MEMS devices [MEMS 2014]\, smart thermal patch using copper stretched up to 800% [Adv. Healthcare Mater. 2015 (frontispiece)]\, mono-crystalline silicon stretched up to 1000% [APL 2014]. Variety of device demonstrations on wide range of inorganic thin films using this technique proves the efficiency and versatility of it. Our research greatly complements the $150M Flexible Hybrid Electronics Manufacturing Initiative (FHEMII) – recently introduced by the US Department of Defense: “Highly tailorable devices on flexible\, stretchable substrates that combined thinned CMOS components with components that are added via printing process”.\n \nView Details
URL:https://www.cecs.uci.edu/event/flexible-stretchable-reconfigurable-cmos-electronics-through-hybrid-integration-of-heterogeneous-materials-for-wearable-interactive-electronic-systems/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150714T150000
DTEND;TZID=America/Los_Angeles:20150714T160000
DTSTAMP:20231011T190519Z
CREATED:20231011T190518Z
LAST-MODIFIED:20231011T190519Z
UID:14437-1436886000-1436889600@www.cecs.uci.edu
SUMMARY:The Future of Heterogeneous Massive Parallel Systems
DESCRIPTION:Speaker: Prof. Avi Mendelson\, Technion\, Israel Institute of TechnologyTitle: The Future of Heterogeneous Massive Parallel Systems\nDate: Wednesday\, October 8\, 2014\nTime: 3:00PM – 4:30PM\nLocation: Donald Bren Hall 3011 \nHost: Prof. Alex Nicolau \nView Details
URL:https://www.cecs.uci.edu/event/the-future-of-heterogeneous-massive-parallel-systems/
LOCATION:CA
CATEGORIES:Other Events
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150709T150000
DTEND;TZID=America/Los_Angeles:20150709T160000
DTSTAMP:20231011T190519Z
CREATED:20231011T190518Z
LAST-MODIFIED:20231011T190519Z
UID:14436-1436454000-1436457600@www.cecs.uci.edu
SUMMARY:Reviving Processing-in-Memory for Large Data Workload on Existing Computer Architecture
DESCRIPTION:Speaker:  Professor Sungjoo Yoo\, Computing and Memory Architecture Lab\, Seoul National University \nTitle:  Reviving Processing-in-Memory for LArge Data Workload on Existing Computer Architecture \nDate:  Tuesday\, July 14\, 2015 \nTime:  11:00 AM \nLocation:  Donald Bren Hall 3011 \nHost:  Nikil Dutt \nAbstract:  Processing-in-memory (PIM) is rebounding from its unsuccessful attempts in 1990s due to two main reasons\, recent advances in 3D stacking technologies and emerging large data workload.  In this talk\, we present two of our recent works\, PIM for large data workload and combining PIM with the existing computer architecture.\nGraph data are becoming more and more popular in many areas such as machine learning\, social network analysis\, etc.  Graph computation is to process a query to the graph database\, e.g.\, finding the most popular personality.  Graph computation is characterized by computation parallelism (per-vertex parallel computation) and significant random memory accesses (to neighbor vertices).  The conventional architecture is not well suited for this type of workload.  We present a programmable PIM accelerator for large-scale graph processing called Tesseract.  Tesseract is composed of (1) a new hardware architecture that fully utilizes the available memory bandwidth\, (2) an efficient method of communication between different memory partitions\, and (3) a programming interface that reflects and exploits the unique hardware design.  It also includes two hardware prefecthers specialized for memory access patterns of graph processing\, which operate base on the hints provided by our programming model.\nIn order to make best use of PIM in more areas\, it is required to integrate the PIM architectures with existing systems in a seamless manner.  The current PIM proposals lack due to two common characteristics: unconventional programming models for in-memory computation units (as programmable co-processors) and lack of ability to utilize large on-chip caches.  We propose a new PIM architecture that (1) does not change the existing sequential programming models and (2) automatically decides whether to execute PIM operations in memory or processors depending on the locality of data.  The key idea is to implement simple in-memory computation using compute-capable memory commands and use specialized instructions\, which we call PIM-enabled instructions\, to invoke in-memory computation.  This allows PIM operations to be interoperable with existing programming models\, cache coherence protocols\, and virtual memory mechanisms with no modification. \nView Details
URL:https://www.cecs.uci.edu/event/reviving-processing-in-memory-for-large-data-workload-on-existing-computer-architecture/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150528T150000
DTEND;TZID=America/Los_Angeles:20150528T160000
DTSTAMP:20231011T190519Z
CREATED:20231011T190518Z
LAST-MODIFIED:20231011T190519Z
UID:14435-1432825200-1432828800@www.cecs.uci.edu
SUMMARY:Computational Neuroscience for Technology: Event-based Vision Sensors and Information Processing
DESCRIPTION:Speaker:  Prof. Jörg Conradt\nTitle:  Computational Neuroscience for Technology: Event-based Vision Sensors and Information Processing \nDate:  Tuesday\, June 2\, 2015 \nTime:  3:00 p.m. \nLocation:  Donald Bren Hall 4011 \nHost:  Jeff Krichmar and Nikil Dutt \nAbstract:  \nIn recent decades the field of Computer Vision has developed sophisticated algorithms for problems such as object tracking or motion extraction based on sequences of high-resolution camera images. Applying such algorithms in real-time robotics reveals an inherent problem: they typically require high data bandwidth and high processing power\, which results in substantial computing machinery and/or delayed processing of data. As part of an optimized biological solution for vision\, our brain developed retinal receptor cells that largely respond with asynchronous events (“neural spikes”) to temporal changes of brightness. Such encoding of visual information substantially reduces the amount of transmitted data and simultaneously increases temporal precision. \nRecently “silicon retinas” have been developed as specialized vision sensors to provide such neuro-inspired vision input for technical systems. Visual information obtained from these sensors differs substantially from traditional sequences of images\, which requires an “event-based” redesign of computer vision algorithms. This talk introduces the neuro-inspired vision sensors and presents event-based algorithms for applications such as real-time computation of optic flow and visual object tracking at high update rates on minimalistic computing hardware. \nView Details
URL:https://www.cecs.uci.edu/event/computational-neuroscience-for-technology-event-based-vision-sensors-and-information-processing/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150521T150000
DTEND;TZID=America/Los_Angeles:20150521T160000
DTSTAMP:20231011T190519Z
CREATED:20231011T190518Z
LAST-MODIFIED:20231011T190519Z
UID:14434-1432220400-1432224000@www.cecs.uci.edu
SUMMARY:CARL-SJR: A Socially Assistive Neurorobot for Autism Therapy and Research
DESCRIPTION:Name: Ting-Shuo Chou\nDate: May 21\, 2015 \nTime: 3:00pm – 5:00pm \nLocation: Social & Behavioral Sciences Gateway 2200 Conference Room \nCommittee Chair: Jeffrey Krichmar (Chair)\, Nikil Dutt\, Alexandru Nicolau \nAbstract: \nNeurodevelopmental disorders\, such as Attention-Deficit–Hyperactivity\nDisorder (ADHD) and Autism Spectrum Disorder (ASD)\, have core clinical\nsymptoms of inattention\, hyperactivity\, and impulsivity (often hyper-\nand hypo- responsiveness. These symptoms are often accompanied by\nreduced motor coordination and impaired sensory processing. We introduce\na Socially Assistive Robot (SAR) with the goal of automating therapy for\nchildren with neurodevelopmental disorders. The novel robot\, which is\ncalled Cognitive Anteater Robotics Laboratory – Spiking Judgment Robot\n(CARL-SJR)\, is designed for therapy and diagnosis. CARL-SJR is\nautonomous and capable of tactile sensing and interaction. A spiking\nneural network model and neurally inspired algorithms controls\nCARL-SJR’s behavior. By providing a large tactile sensing surface that\nencourages touching with hand movements\, CARL-SJR especially addresses\nimpairments in tactile sensitivity and social interaction observed in\nchildren with neurodevelopmental disorders. Using CARL-SJR\, we conducted\na pilot study where children with different neurodevelopment disorders\nshow different behavioral metrics and tactile movements. The results\nsuggest CARL-SJR might serve as a diagnose tool for developmental\ndisorders. Second\, we showed that the information carried by temporal\ncoding is higher than the traditional rate coding when decoding spike\ntrains in response to tactile movements. Third\, we implemented online\nlearning capabilities on CARL-SJR\, where the robot could associate a\nuser’s preferred color pattern displayed on the robot with the user’s\nhand sweep across the robot’s body. The emerged behaviors and neural\nactivities in the SNN are consistent with biological recordings. The\nunderlying neural mechanism in the SNN also serves as an alternative\nexplanation of how brains encode timing and associate (or learning) two\ntemporal separated events.
URL:https://www.cecs.uci.edu/event/carl-sjr-a-socially-assistive-neurorobot-for-autism-therapy-and-research/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150521T150000
DTEND;TZID=America/Los_Angeles:20150521T160000
DTSTAMP:20231011T190511Z
CREATED:20231011T190511Z
LAST-MODIFIED:20231011T190511Z
UID:14433-1432220400-1432224000@www.cecs.uci.edu
SUMMARY:Ensuring Reliability and Fault-Tolerance for the Cyber-Physical System Design
DESCRIPTION:Name: Volkan Gunes\nDate: May 27\, 2015 \nTime: 11:00AM – 12:00PM \nLocation: Donald Bren Hall 3013 Conference Room \nCommittee: Tony Givargis (Chair)\, Alexandru Nicolau\, Ian Harris\, Steffen Peter \nAbstract: \nThe cyber-physical system (CPS) is a term describing a broad range of\ncomplex\, multi-disciplinary\, physically-aware next generation engineered\nsystems that integrate embedded computing technologies (cyber part) into\nthe physical world. Sensors play an important role in this integration\nbecause they provide the data extracted from the physical world for the\ncyber systems to fulfill the decision making process. However\, this\nprocess is likely to be misled by incorrect data due to sensor fault\noccurrences. \nIn this dissertation\, the main focus is on sensor fault mitigation and\nachieving high reliability in CPS operations. One of the challenges we\nponder is timely event (e.g.\, motion as a phenomenon) detection in CPS\nunder possible faulty sensor conditions. In this regard\, our\ndemonstrative example of CPS is the falling ball example (FBE) using\nbinary event detectors (i.e.\, motion sensors)\, a controller\, and a\ncamera for timely motion detection of a falling ball. Another challenge\nwe ponder is satisfying thermal comfort and energy efficiency under\ncertain faulty sensor conditions in a multi-room building incorporating\ntemperature sensors\, controllers\, and heating\, ventilation\, and air\nconditioning (HVAC) systems as a CPS application. For both cases\, we\nadopt a model-based design (MBD) methodology to analyze the effect of\nsensor faults on the desired system outcome. We specify well-defined\nfault semantics for the event detectors and temperature sensors to make\nthe problem definition more clear. We provide a MATLAB/Simulink\nsimulation framework for our CPS examples. Besides having the\ntraditional CPS model that comprises the cyber\, interface (e.g. sensors\nand actuators) and physical models\, we develop fault models and a system\nevaluation model in Simulink and incorporate them into the CPS model. \nWe explore various techniques for fault mitigation in a holistic design\nperspective. Therefore\, the approaches presented in this study\ncontributes to the design of fault-tolerant CPSs. Furthermore\,\nconsidering compute demands of large scale CPSs\, we introduce the XGRID\nembedded many-core system-on-chip architecture. XGRID makes use of a\nnovel\, FPGA-like\, programmable interconnect infrastructure\, offering\nscalability and deterministic communication using hardware supported\nmessage passing among cores. We provide a conceptual mapping of control\nalgorithms for the automation of a multi-room building onto target XGRID\narchitecture. \nOur findings regarding reliable CPS design show that the physical system\nattributes (e.g.\, sensor placement and environmental effects) can be a\nmore dominant factor than the cyber system attributes on the system\noutcome. In addition\, sensor faults may lead to unsatisfactory system\noutcome in CPSs since CPSs heavily rely on sensor readings for decision\nmaking. Therefore\, the analysis of temporal and spatial correlations\nbetween sensor readings helps mitigate certain types of sensor faults\nand enable CPSs to utilize sensors’ data more efficiently for decision\nmaking.
URL:https://www.cecs.uci.edu/event/ensuring-reliability-and-fault-tolerance-for-the-cyber-physical-system-design/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150515T150000
DTEND;TZID=America/Los_Angeles:20150515T160000
DTSTAMP:20231011T190511Z
CREATED:20231011T190511Z
LAST-MODIFIED:20231011T190511Z
UID:14432-1431702000-1431705600@www.cecs.uci.edu
SUMMARY:Temperature-Aware Design for SoCs using Thermal Gradient Analysis
DESCRIPTION:Name: Jun Yong Shin\nDate: May 18th\, 2015 \nTime: 2:00PM \nLocation: EH2430\, Harut colloquia room \nCommittee Chair: Nikil Dutt \nAbstract: \nOver the last few decades\, chip performance has increased steadily due to continuous and aggressive technology scaling. However\, it leaves chips quite vulnerable to several issues at the same time; high power densities in some particular areas spread across a chip might result in hotspots and thermal gradients\, and these can lead to permanent damage to the chip and also can reduce the reliability of the entire system using the chip. As a result\, a large number of dynamic thermal management solutions have been proposed in recent years for use in multi-core architectures\, and the accurate temperature information over the entire chip area has become indispensable especially for fine-grain dynamic thermal management solutions. Naturally\, on-chip thermal sensors came to play an important role in providing the accurate information on the temperature distribution of a chip\, but there still remain some issues regarding the allocation of on-chip thermal sensors; due to power\, area and routing issues\, it is preferable to limit the number of on-chip thermal sensors on a die\, and their placement needs to be considered carefully in order to increase the accuracy of full-chip thermal profile reconstruction especially when just a small number of sensors can be implemented; due to the limited reading accuracy of low-power\, small-sized on-chip thermal sensors\, it would be better to have some way to improve their reading accuracy. \nIn this work\, an issue will be firstly addressed regarding how to improve the reading accuracy of a low-power\, small-sized on-chip thermal sensor such as Ring-Oscillator (RO) based sensors at runtime on a software level. Secondly\, a question of how to allocate a proper number of sensors on a die in order to get the accurate full-chip scale thermal information on the run is addressed. Additionally\, a temperature-aware routing for global interconnects to minimize the delay and also to reduce the probability of chip failure due to electromigration is presented at the end.
URL:https://www.cecs.uci.edu/event/temperature-aware-design-for-socs-using-thermal-gradient-analysis/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150512T150000
DTEND;TZID=America/Los_Angeles:20150512T160000
DTSTAMP:20231011T190510Z
CREATED:20231011T190510Z
LAST-MODIFIED:20231011T190510Z
UID:14431-1431442800-1431446400@www.cecs.uci.edu
SUMMARY:Design Technologies for Embedded Multiprocessor Systems-on-Chip
DESCRIPTION:Speaker:  Prof. Rainer Leupers \nTitle: Design Technologies for Embedded Multiprocessor Systems-on-Chip \nDate: Thursday\, April 9\, 2015 \nTime: 11:00am \nLocation: Harut Barsamian Colloquia Room (Engineering Hall 2430) \nHost: Mohammad Al Faruque \nAbstract:  \nThe trend towards Multicore and even Manycore architectures affects virtually all areas of computing today. Especially in the mobiles and consumer domains\, an extremely high architectural efficiency (MIPS/Watt) is required. In order to manage the complexity of multi-billion transistor IC designs with dozens of heterogeneous processing engines\, advanced Electronic System Level (ESL) tools are required. ESL can be roughly subdivided into four categories: architecture modeling and optimization\, application SW mapping\, simulation and verification\, and efficient IP block design. After a general introduction to embedded MPSoC (Multiprocessor Systems-on-Chip) architectures and ESL technologies\, this seminar talk will cover selected aspects from the above four domains\, in particular ESL power estimation\, embedded multicore SW development\, fast virtual platforms\, and application-specific processor design. \nFor more information\, click here.
URL:https://www.cecs.uci.edu/event/design-technologies-for-embedded-multiprocessor-systems-on-chip/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150507T150000
DTEND;TZID=America/Los_Angeles:20150507T160000
DTSTAMP:20231011T190510Z
CREATED:20231011T190510Z
LAST-MODIFIED:20231011T190510Z
UID:14430-1431010800-1431014400@www.cecs.uci.edu
SUMMARY:Resilient On-Chip Memory Design in the Nano Era
DESCRIPTION:Final Defense – Abbas Banaiyanmofrad\n\nMay 20\, 2015\n3pm – 5pm\nDonald Bren Hall 3011 Conference Room \nCommittee:\nNikil Dutt (Chair)\, Alex Nicolau\, Alex Veidenbaum \nTitle:\nResilient On-Chip Memory Design in the Nano Era \nAbstract:\nAggressive technology scaling in the nano-scale regime makes chips more susceptible to failures. This causes multiple reliability challenges in the design of modern chips\, including manufacturing defects\, wear-out\, and parametric variations. By increasing the number\, amount\, and hierarchy of on-chip memory blocks in emerging computing systems\, the reliability of the memory sub-system becomes an increasingly challenging design issue. Existing resilient memory design schemes are unable to effectively address the key features of scalability\, interconnect-awareness\, and cost-effectiveness for these platforms. In this thesis\, we propose different approaches to address resilient on-chip memory design in computing systems ranging from traditional single-core processors to emerging many-core platforms. We classify our proposed approaches in five main categories: 1) Flexible and low-cost approaches to protect cache memories in single-core processors against permanent faults and transient errors\, 2) Scalable fault-tolerant approaches to protect last-level caches with non-uniform cache access in chip multiprocessors\, 3) Interconnect-aware cache protection schemes in network-on-chip architectures\, 4) Application-aware memory resiliency for approximate computing era\, and 5) System-level design space exploration\, analysis\, and optimization for redundancy-aware on-chip memory resiliency in many-core platforms. ​  \n In summary\, the premise of this thesis is to provide multiple solutions in different layers of system hierarchy targeting a verity of architectures from embedded single-core microprocessors to emerging large many-core platforms to address cost-efficient error-resiliency of on-chip memory components. \n 
URL:https://www.cecs.uci.edu/event/resilient-on-chip-memory-design-in-the-nano-era/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150416T150000
DTEND;TZID=America/Los_Angeles:20150416T160000
DTSTAMP:20231011T190322Z
CREATED:20231011T190322Z
LAST-MODIFIED:20231011T190322Z
UID:14397-1429196400-1429200000@www.cecs.uci.edu
SUMMARY:Self-stabilizing Java: Tool Support for Building Robust Software
DESCRIPTION:Name: Yong hun EomDate: April 15\, 2015\nTime: 10:00am\nLocation: EH 2430\nCommittee Chair: Professor Demsky\nCommittee members: Prof. Pai Chou and Prof. Rainer Doemer \nTitle: Self-stabilizing Java: Tool Support for Building Robust Software \nAbstract:\nDeveloping robust software systems remains an open research problem. The\ncurrent approaches for improving software reliability mainly focus on\nminimizing the number of software bugs through formal verification or\nextensive testing. Despite such efforts\, it is common that unexpected\nsoftware bugs corrupt a program’s state and cause systems to fail. \nThe motivation for this research is to embrace the fact that it is\ndifficult to guarantee that software is error-free. We present\nSelf-stabilizing Java (SJava) that instead checks that a program\nself-stabilizes. Self-stabilizing programs automatically recover to the\ncorrect state from the corrupted state caused by software bugs and other\nsources. A number of applications are inherently self-stabilizing—such\nprograms typically overwrite all non-constant data with new input data. \nWe have developed a type system and static analyses that together check\nwhether program executions eventually transition from incorrect states\nto the correct state. We combine this with a code-generation strategy\nthat ensures that a program continues executing long enough to\nself-stabilize. Furthermore\, in order to lower the burden of type\nannotations\, we present an annotation inference algorithm that\nautomatically derives an initial set of annotations. \nOur experience using SJava indicates that our system successfully\nchecked that several benchmarks were self-stabilizing and effectively\ninferred annotations for our benchmarks.
URL:https://www.cecs.uci.edu/event/self-stabilizing-java-tool-support-for-building-robust-software/
LOCATION:CA
CATEGORIES:PhD Defenses
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150304T150000
DTEND;TZID=America/Los_Angeles:20150304T160000
DTSTAMP:20231011T190510Z
CREATED:20231011T190510Z
LAST-MODIFIED:20231011T190510Z
UID:14429-1425481200-1425484800@www.cecs.uci.edu
SUMMARY:Architectural Support for Security in Emerging Platforms
DESCRIPTION:Speaker: Nael Abu-Ghazaleh \nTitle: Architectural Support for Security in Emerging Platforms \nDate: Wednesday\, March 4\, 2015 \nTime: 10:00am \nLocation: Harut Barsamian Colloquia Room (Engineering Hall 2430) \nHost: Fadi Kurdahi \nAbstract:  \nComputer systems are facing a growing threat from increasingly motivated\, organized and sophisticated attackers.  The problem is complicated by the rapid evolution that computing platforms are experiencing towards mobile and embedded devices\, as well as many-core systems\, distributed systems\, virtualization and clouds.  These emerging platforms offer new system and use models and therefore are subject to new vulnerabilities and threat models.  This talk motivates the role that computer architecture must play in securing current and emerging systems.  I will define this role spanning three primary directions: (1) new security models for protecting not only systems but also applications; (2) architecture support for monitoring to improve resilience to attacks\, but also to rapidly detect and contain successful attacks; and (3) Security for emerging architectures.  I will animate each of these directions with examples from our recent work.
URL:https://www.cecs.uci.edu/event/architectural-support-for-security-in-emerging-platforms/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150304T150000
DTEND;TZID=America/Los_Angeles:20150304T160000
DTSTAMP:20231011T190459Z
CREATED:20231011T190456Z
LAST-MODIFIED:20231011T190459Z
UID:14423-1425481200-1425484800@www.cecs.uci.edu
SUMMARY:Towards the Automatic Application and Verification of Countermeasures Against Physical Attacks
DESCRIPTION:Speaker: Francesco Regazzoni \nTitle: Towards the Automatic Application and Verification of Countermeasures Against Physical Attacks \nDate: Tuesday\, March 3\, 2015 \nTime: 2:00pm \nLocation: Donald Bren Hall 3011 \nHost: Nikil Dutt & Rosario Cammarota \nAbstract:  \nPhysical attacks exploit the physical weaknesses of cryptographic devices to reveal the secret information stored on them. Countermeasures against these attacks are often considered only in the later stages of the full design flow\, and applied manually by designers with strong security expertise. This approach\, however\, negatively affects the robustness\, the cost\, and the production time of secure devices. \nIn view of this increasingly relevant problem\, it is crucial to address the design challenges associated with the proliferation of physical attacks\, developing a methodology to automate the design and the verification of secure embedded systems. \nThis talk focuses on one type of physical attacks\, the differential power analysis (DPA)\, and presents the design and the implementation of the infrastructure needed to enable the automatic application and verification of DPA countermeasures.
URL:https://www.cecs.uci.edu/event/towards-the-automatic-application-and-verification-of-countermeasures-against-physical-attacks/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150212T150000
DTEND;TZID=America/Los_Angeles:20150212T160000
DTSTAMP:20231011T190458Z
CREATED:20231011T190456Z
LAST-MODIFIED:20231011T190458Z
UID:14419-1423753200-1423756800@www.cecs.uci.edu
SUMMARY:Inertial and Bio-potential-based Wearable Computers: Algorithms and Applications
DESCRIPTION:Title: Inertial and Bio-potential-based Wearable Computers: Algorithms and Applications\nSpeaker:  Professor Roozbeh Jafari \nDate/Time:  Thursday\, February 12\, 2015\, 11:00am to 12:00pm \nLocation:  Donald Bren Hall 4011 \nHost: Eli Bozorgzadeh \nAbstract:  \nWearable computers bring to fruition many new opportunities to continuously monitor human body with sensors placed on body; whether they are intended to detect an early onset of a disease\, assess human performance or determine the effectiveness of a treatment. In the past few years\, the community has observed a large number of applications leveraging wearable computers. There are\, however\, a number of fundamental challenges that need to be addressed before realizing the true ubiquitous use of the wearable computing systems. \nIn the first half of the talk\, we highlight several inertial-based wearable applications including systems capable of monitoring activities of daily living (ADLs) and home exercises for senior citizen. We focus on a class of signal processing algorithms that provide extreme robustness leveraging accelerometers and gyroscopes. We present our results on ADLs and highlight our efforts in line with data dissemination for the scientific community. In the second half of the presentation\, we focus on dry-contact electroencephalography (EEG). We present our brain-computer interface (BCI) system developed for intensive care units leveraging dry-contact EEG. We outline several components of EEG systems and focus on skin-electrode contact noise. \nWe provide techniques for noise reduction including contact reconfiguration along with experimental verifications. We provide concluding remarks on the trends of wearable computing technology development and future directions.
URL:https://www.cecs.uci.edu/event/inertial-and-bio-potential-based-wearable-computers-algorithms-and-applications/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150210T150000
DTEND;TZID=America/Los_Angeles:20150210T160000
DTSTAMP:20231011T190459Z
CREATED:20231011T190456Z
LAST-MODIFIED:20231011T190459Z
UID:14420-1423580400-1423584000@www.cecs.uci.edu
SUMMARY:Design Automation of Things: Power Consumption Characterization\, Modeling and Estimation of Electric Vehicles
DESCRIPTION:Title: Design Automation of Things: Power Consumption Characterization\, Modeling and Estimation of Electric Vehicles\nSpeaker:  Professor Naehyuck Chang \nDate/Time:  Tuesday\, February 10\, 2015\, 2:00pm to 3:00pm \nLocation:  Harut Barsamian Colloquia Room (EH 2430) \nHost: Nikil Dutt \nAbstract:  \nRapid electric vehicle (EV) penetration gives a threatening challenge in electric energy generation. An 1\,814 kg curb weight full electric vehicle driving 18\,129 km/year consumes electricity energy equivalent to 74% of the total residential electricity use per person in the US. This implies that 27% more nationwide electricity generation is needed when 70% of passenger vehicles are replaced with EVs. \nThis talk introduces the first step toward systematic EV design-time and runtime optimization. We develop instantaneous power consumption modeling of an EV by the curb weights\, speed\, acceleration\, road slope\, passenger and cargo weights\, motor capacity\, and so on\, as a battery discharge model. The model also considers the onboard charger\, regenerative braking and so on\, as a battery charge model. To insure model fidelity\, we fabricate a lightweight custom EV\, perform extensive measurement\, and derive model coefficients using multivariable regression analysis. We estimate the EV instantaneous power consumption of a given speed and route profiles and verify the estimation fidelity with a real test run data. This talk will also cover the on-going project for the next version electric vehicle with four-wheel drive capability. \n 
URL:https://www.cecs.uci.edu/event/design-automation-of-things-power-consumption-characterization-modeling-and-estimation-of-electric-vehicles/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20150210T150000
DTEND;TZID=America/Los_Angeles:20150210T160000
DTSTAMP:20231011T190459Z
CREATED:20231011T190456Z
LAST-MODIFIED:20231011T190459Z
UID:14422-1423580400-1423584000@www.cecs.uci.edu
SUMMARY:Connected Context Computing for Smart IoT
DESCRIPTION:Speaker: Jane Yung-jen Hsu \nTitle: Connected Context Computing for Smart IoT \nDate: Tuesday\, February 10\, 2015 \nTime: 3:30pm \nLocation: Harut Barsamian Colloquia Room (Engineering Hall 2430) \nHost: Professor Kwei-Jay Lin \nAbstract:  \nWe are witnessing the explosion of connected devices\, or the so-called Internet of Things\, in our everyday lives. This new trend has created new opportunities to monitor human activities and to configure environments for comfort\, security\, or energy savings. In the US\, buildings account for roughly 40% of total energy usage\, with major contributions from the cooling demands. While most people have no intention of wasting energy\, they are often unaware of the energy footprint of their daily routines. Activity recognition is a key capability for a smart environment to offer timely services and intelligent interactions with people. \nIn this talk\, I will introduce connected context computing and its significance in enabling our vision of smart IoT. In particular\, I will share our experience on monitoring the Computer Science building on NTU campus to improve its air conditioning and space utilization. First\, an agent-based HVAC service is designed to analyze cooling demands and wastes. Second\, experiments on SweetFeedback are conducted to encourage energy-saving behaviors. Third\, crowd sourcing cyber-physical agents are deployed to acquire status labels for activity recognition from people situated in the environment. Â Our experiments showed that context computing\, predictive analytics\, and proactive control are the fundamental building blocks for a smart IoT framework that can SCALE (Sense\, Communicate\, Analyze\, Learn\, Expect and Effect). \n 
URL:https://www.cecs.uci.edu/event/connected-context-computing-for-smart-iot/
LOCATION:CA
CATEGORIES:Seminars at CECS
END:VEVENT
END:VCALENDAR