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DTSTART;TZID=America/Los_Angeles:20260723T100000
DTEND;TZID=America/Los_Angeles:20260723T110000
DTSTAMP:20261027T171214Z
CREATED:20260711T000304Z
LAST-MODIFIED:20261027T171214Z
UID:16839-1784800800-1784804400@www.cecs.uci.edu
SUMMARY:The Brave New (Quantum) World
DESCRIPTION:Title: The Brave New (Quantum) World \nSpeaker: Dr. Anupam Chattopadhyay \nDate and Time: Thursday\, July 23\, 10:00am \nLocation: ISEB 1310 \nAbstract: \nMajor advances across all the design stack of Quantum computing – algorithm\, software\, and hardware – has brought us to a realm where\, it is impossible to ignore the effect of Quantum computing in the world around us. We will discuss two aspects of Quantum computing in this talk. First\, efficient circuit design and automation challenges – and how we can borrow some knowledge from classical computing for that. We will conclude this part with case studies on experimental Quantum computers. Second\, the most important practical threat from a large-scale Quantum computer is on public-key cryptography. This is countered by developing and standardizing Post-Quantum Cryptography (PQC) primitives. We will talk about various PQC candidates and the perils of migration to a Quantum-safe environment. \nBiography: \nAnupam Chattopadhyay is currently an Associate Professor (with tenure) in College of Computing & Data Science\, Nanyang Technological University (NTU). He received his B.E. degree from Jadavpur University\, India\, MSc. from ALaRI\, Switzerland and PhD from RWTH Aachen in 2000\, 2002 and 2008\, respectively. His research in the broad domains of Electronic Design Automation\, Cyber Security\, Internet-of-Things (IoT) and Application-Specific Instruction-Set Processors (ASIPs) has been published in 200+ IEEE/ACM conferences and journals and has led to multiple spinoffs and technology transfers. Anupam has served in the TPCs of major EDA/VLSI conferences and edited a Springer Major Reference Work on Computer Architectures. Anupam’s research has garnered several best paper awards\, most recently in VLSI-SoC 2024 for Quantum adders\, and in CHES 2025 for side-channel attack on PQC standard Kyber. He was awarded fellowship of Japanese Society for Promotion of Science (JSPS)\, fellowship of Intercontinental Academia and was awarded NTU Innovation and Entrepreneurship award in 2025. \nHosted By: Prof. Mohammad Al Faruque \nMore Information
URL:https://www.cecs.uci.edu/event/the-brave-new-quantum-world/
LOCATION:ISEB 1310
CATEGORIES:Seminars at CECS
ATTACH;FMTTYPE=image/png:https://cecs.uci.edu/files/2026/07/anupam_headshot-e1784669594620.png
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DTSTART;TZID=America/Los_Angeles:20260729T110000
DTEND;TZID=America/Los_Angeles:20260729T120000
DTSTAMP:20260727T155342Z
CREATED:20260721T213151Z
LAST-MODIFIED:20260727T155342Z
UID:16859-1785322800-1785326400@www.cecs.uci.edu
SUMMARY:Software-Defined Accelerator-Centric Systems - A Journey to AI and Big Data Acceleration
DESCRIPTION:Title: Software-Defined Accelerator-Centric Systems – A Journey to AI and Big Data Acceleration \nSpeaker: Dr. Zhenman Fang \nDate and Time: Wednesday\, July 29\, 11:00am \nLocation: ISEB 4020 \nAbstract: \nWith the end of CPU scaling due to dark silicon limitations\, customizable hardware accelerators have gained increasing attention in modern datacenters and edge devices\, due to their low power\, high performance\, and high energy-efficiency. Unfortunately\, not everyone can design hardware accelerators and there remains a substantial gap for the large community of software developers to effectively leverage the benefits of domain-specific hardware acceleration. \nIn this talk\, I will share my research on software-defined accelerator-centric systems. First\, I will give an overview of the unique advantages of hardware accelerators using the roofline model and illustrate common hardware customization techniques that can be defined by software. Next\, I will share my research journey to AI and big data acceleration\, and demonstrate two successful case studies of accelerator-centric systems: 1) HeatViT\, a hardware-efficient image-adaptive token pruning framework for efficient yet accurate vision transformer (ViT) acceleration on edge FPGAs\, with a key focus on algorithm/hardware codesign; and 2) SQL2FPGA\, a compiler that automatically compiles big data queries onto datacenter FPGA accelerators\, with a key focus on improving software programmability. Finally\, I will discuss future research directions of software-defined accelerator-centric systems. \nBiography: \nDr. Zhenman Fang is an Associate Professor in Department of Electrical and Computer Engineering\, University of Minnesota\, Twin Cities. He is on leave from School of Engineering Science\, Simon Fraser University\, Canada\, where he joined since Apr 2019. Zhenman founded and directs the HiAccel lab. Zhenman’s recent research focuses on customizable computing with software-defined hardware acceleration\, which aims to sustain the ever-increasing performance and energy-efficiency demands of important application domains in post-Moore’s law era. It spans the entire computing stack\, including emerging application characterization and acceleration (including machine learning\, big data analytics\, high-performance computing\, and precision medicine)\, novel accelerator-rich and near-data computing architecture designs\, and corresponding programming\, runtime\, and tool support. \nZhenman has published over 80 papers in top-tier conferences and journals and holds two US patents\, including the ICCAD 10 Year Retrospective Most Influential Paper Award in 2025\, three best paper awards (FPL 2024 Stamatis Vassiliadis Best Paper\, TCAD 2019 Donald O. Pederson Best Paper\, and MEMSYS 2017 Best Paper)\, four best paper nominees (ICCAD 2025\, FCCM 2025\, HPCA 2017 and ISPASS 2018)\, and an invited paper from Proceedings of the IEEE 2019. His research has also been recognized with the inaugural SFU Research Excellence Award – Horizon Award (2025)\, a NSERC (Natural Sciences and Engineering Research Council of Canada) Alliance Award (2020)\, a CFI JELF (Canada Foundation for Innovation John R. Evans Leaders Fund) Award (2019)\, a Xilinx University Program Award (2019)\, a Team Award from Xilinx Software and IP Group (2018)\, and a Postdoc Fellowship from UCLA Institute for Digital Research and Education (2016-2017). Zhenman has also actively served in the organizing and program committee of top-tier conferences in the areas of FPGA and reconfigurable computing\, design automation\, and computer architecture. Recently\, he has served as Program Vice Chair of FCCM 2026\, Journal Track Chair of FPL 2026\, General Chair of ASAP 2025\, Program Chair of RAW 2024 and RAW 2025. More details can be found in his website: https://zhenman.github.io/. \nHosted By: Prof. Sitao Huang \nMore Information
URL:https://www.cecs.uci.edu/event/software-defined-accelerator-centric-systems-a-journey-to-ai-and-big-data-acceleration/
LOCATION:ISEB 4020\, Interdisciplinary Science and Engineering Building\, Irvine\, CA\, 92697\, United States
CATEGORIES:Seminars at CECS
ATTACH;FMTTYPE=image/jpeg:https://cecs.uci.edu/files/2026/07/Zhenman-Fang.jpg
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DTSTART;TZID=America/Los_Angeles:20260730T103000
DTEND;TZID=America/Los_Angeles:20260730T113000
DTSTAMP:20260915T171945Z
CREATED:20260711T001319Z
LAST-MODIFIED:20260915T171945Z
UID:16849-1785407400-1785411000@www.cecs.uci.edu
SUMMARY:From Domain-Specific Accelerators to Spatial Architecture Exploration
DESCRIPTION:Title: From Domain-Specific Accelerators to Spatial Architecture Exploration \nSpeaker: Dr. Jongeun Lee \nDate and Time: Thursday\, July 30\, 10:30am \nLocation: ISEB 1310 \nAbstract: \nEmerging scientific and machine learning workloads increasingly benefit from domain-specific hardware accelerators\, yet designing efficient architectures for these applications requires both effective implementations and scalable methods for architectural exploration. In this talk\, I will present our recent research on accelerator design and architecture exploration for spatial computing systems. \nI will first introduce AccelOrb\, an FPGA accelerator for Orb v2\, a graph neural network-based machine learning force field (MLFF) used in molecular dynamics simulations. By analyzing the application’s computational bottlenecks and memory requirements\, we develop a memoryaware streaming architecture that substantially improves performance while operating within the resource constraints of a modern FPGA. \nBuilding on the lessons learned from accelerator implementation\, I will then discuss FlowSpec\, a flexible framework for modeling and simulating coarse-grained spatial architectures. Rather than targeting a single accelerator design\, FlowSpec provides a scalable interface between application mapping and architectural simulation\, enabling rapid exploration of diverse compute organizations and communication networks. \nTogether\, these efforts highlight a research direction that bridges application-driven accelerator design with the systematic exploration of future spatial architectures. \nBiography: \nJongeun Lee received his B.S. and M.S. degrees in Electrical Engineering and his Ph.D. in Electrical Engineering and Computer Science from Seoul National University\, Korea. In 2009\, he joined Ulsan National Institute of Science and Technology (UNIST)\, Ulsan\, Korea\, where he is currently a Professor at the Department of Electrical Engineering. Before joining UNIST\, he was a postdoctoral research associate at Arizona State University in Tempe\, Arizona\, USA\, and also worked at Samsung Electronics\, Korea. \nProfessor Lee has authored more than 100 peer-reviewed journal and conference publications. He currently serves as Editor-in-Chief of IEEE Embedded Systems Letters and has served on the technical program and organizing committees of numerous conferences and workshops in computer-aided design and reconfigurable computing. His research interests include hardware/software co-design\, reconfigurable architectures\, deep learning\, and computer-aided design for emerging technologies. \nHosted By: Prof. Fadi Kurdahi \nMore Information
URL:https://www.cecs.uci.edu/event/from-domain-specific-accelerators-to-spatial-architecture-exploration/
LOCATION:ISEB 1310
CATEGORIES:Seminars at CECS
ATTACH;FMTTYPE=image/jpeg:https://cecs.uci.edu/files/2026/07/2023-jlee4-l.jpg
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