BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//CECS - ECPv6.18.4//NONSGML v1.0//EN
CALSCALE:GREGORIAN
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REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20260308T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20261101T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20270314T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20271107T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260213T103000
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DTSTAMP:20261027T171407Z
CREATED:20260115T203609Z
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UID:16669-1770978600-1770982200@www.cecs.uci.edu
SUMMARY:GOAL: An Industrially Validated Global Optimization Framework for Advanced Macro Placement in Semiconductor Design
DESCRIPTION:Title: GOAL: An Industrially Validated Global Optimization Framework for Advanced Macro Placement in Semiconductor Design \nSpeaker: Jooyoung Lee \nDate and Time: Friday\, February 13\, 10:30am \nLocation: EH 2430 \nAbstract: \nMost current AI solutions in industry rely on LLM architectures\, which are fundamentally unsuited for high-dimensional combinatorial optimization. In contrast\, we target problem classes that LLMs and conventional reinforcement learning (RL) cannot solve. System-level macro placement in advanced semiconductor design represents an extremely large-scale combinatorial optimization space\, with a search complexity exceeding astronomical scales. Prior RL-based approaches from major EDA vendors and research groups have not translated into production-level performance\, largely due to sparse and ambiguous reward structures in real-world design constraints. \nOur CSA global-optimization framework is engineered specifically for such non-convex\, high-dimensional search problems. Its performance has been validated through back-to-back victories in The Critical Assessment of Protein Structure Prediction (CASP) and through “Badugi\,” the first Korean AI system to defeat a professional Go player?both demonstrating its capability to navigate vast\, rugged solution landscapes. \nWe have collaborated with a leading global semiconductor manufacturer to evaluate our technology on a top-tier\, cutting-edge semiconductor device. The CSA-based macro-placement engine produced layouts superior to those of veteran human designers and showed strong potential to reduce overall physical-design cycle time by more than half. \nUnlike costly RL-driven\, general-purpose optimization tools\, our solution is built on a dedicated combinatorial-optimization engine that directly models the search space rather than relying on proxy rewards. We are advancing AI that can reliably solve the hardest optimization problems in semiconductor design and beyond. \nBiography: \nProf. Jooyoung Lee\, Good Intelligence CEO\, received his PhD in Physics in 1990 from Brown University under the supervision of Prof. JM Kosterlitz (2016 Nobel laureate in Physics). Since 1994\, his research focused on solving the protein folding problem\, and he led a KIAS (Korea Institute for Advanced Study) team in the CASP (protein structure modeling) competition for CASP5-CASP12 (2002-2016). Motivated by the superhuman performance of AlphaGo\, with an ultimate eye towards improvements in protein folding prediction\, Prof. Lee’s research interest temporarily turned to deep learning. He started with its application to the game of Go\, and implemented a unique deep learning method to compete in world Go AI competitions (2nd place in the 2019 Fuzhou Go AI competition; 3rd place in the 11th Computer Go UEC Cup). \nProf. Lee\, a professor in the school of computational sciences at KIAS\, has published more than 120 peer-reviewed papers in various SCI journals. Many of these papers are well cited [(over 4700 citations from SCI journals and over 3900 citations to his first/corresponding-authored papers (as of Sept. 2018)]. His publication H-Index is 34. \nHosted By: Prof. Ian Harris \nMore Information
URL:https://www.cecs.uci.edu/event/goal-an-industrially-validated-global-optimization-framework-for-advanced-macro-placement-in-semiconductor-design/
LOCATION:EH 2430\, Engineering Hall\, University of California\, Irvine\, Irvine\, CA\, 92697\, United States
CATEGORIES:Seminars at CECS
ATTACH;FMTTYPE=image/jpeg:https://cecs.uci.edu/files/2026/01/JooyoungLee_Photo-e1793121242113.jpg
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