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DTSTART;TZID=America/Los_Angeles:20160208T150000
DTEND;TZID=America/Los_Angeles:20160208T160000
DTSTAMP:20231011T190600Z
CREATED:20231011T190600Z
LAST-MODIFIED:20231011T190600Z
UID:14459-1454943600-1454947200@www.cecs.uci.edu
SUMMARY:Mitigating BTI-induced Device Degradation: A Circuit and System Persepctive
DESCRIPTION:Title: Mitigating BTI-induced Device Degradation: A Circuit and System Persepctive\nSpeaker: Professor Ing-Chao Lin\, National Cheng Kung University\, Taiwan \nDate and Time: Monday\, February 8\, 2016 at 1:30 P.M. \nLocation: Donald Bren Hall 3011 \nHost: Professor Nikil Dutt \nAbstract: Bias temperature instability which causes a shift in the transistor’s threshold voltage and decreases circuit switching speed has become a major reliability concern. In this talk\, I will introduce the techniques to mitigate device degradation at the circuit and system level\, and provide design guidelines to deal with device degradation. The future trend on device degradation will be introduced as well. \nBiography: Prof. Ing‐Chao Lin received his M.S. degree from Dept. of Computer Science and Information Engineering\, National Taiwan University and Ph.D. degree from Dept. of Computer Science and Engineering\, the Pennsylvania State University 2001 and 2007\, respectively. From 2007 to 2009\, he is a staff R&D engineer in Real Intent Inc.\, CA\, USA\, where he is working on Real Intent’s automatic timing exception verifier. His research interest includes reliable power‐aware system\, electronic design automation\, and computer architecture. He has authored or co‐authored more than 50 scientific papers and is a committee member of many technical conferences. He is a senior member of IEEE and he is thechair of IEEE Tainan Young Professional group. He is the recipient of 2015 Excellent Young Researcher Award by Chinese Institute of Electrical Engineering. He is currently a visiting scholar in Dept. of Electrical and Computer Engineering\, University of California\, Santa Barbara. \n  \nView more details here \n 
URL:https://www.cecs.uci.edu/event/mitigating-bti-induced-device-degradation-a-circuit-and-system-persepctive/
LOCATION:CA
CATEGORIES:Seminars at CECS
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DTSTART;TZID=America/Los_Angeles:20160218T150000
DTEND;TZID=America/Los_Angeles:20160218T160000
DTSTAMP:20231011T190555Z
CREATED:20231011T190554Z
LAST-MODIFIED:20231011T190555Z
UID:14453-1455807600-1455811200@www.cecs.uci.edu
SUMMARY:Energy-Efficient Capacitance-to-Digital Converters for Low-Energy Sensor Nodes
DESCRIPTION:Title: “Energy-Efficient Capacitance-to-Digital Converters for Low-Energy Sensor Nodes”\nSpeaker: Professor Khaled N. Salama\, King Abdullah\, University of Science and Technology\, Saudi Arabia \nDate and Time: Thursday\, February 18\, 2016 at 11:00 A.M. \nLocation: Engineering Hall 2430 \nHosts: Fadi J. Kurdahi and Ahmed Eltawil \nAbstract: Energy efficiency is a key requirement for wireless sensor nodes\, biomedical implants\, and wearable devices. The energy consumption of the sensor node needs to be minimized to avoid battery replacement\, or even better\, to enable the device to survive on energy harvested from the ambient. Capacitive sensors do not consume static power; thus\, they are attractive from an energy efficiency perspective. In addition\, they can be employed in a wide range of sensing applications\, such as pressure\, humidity\, biological\, and chemical sensing. However\, the capacitive sensor readout circuit—i.e.\, the capacitance-to-digital converter (CDC) —can be the dominant source of energy consumption in the system. Thus\, the development of energy-efficient CDC architectures is crucial to minimizing the energy consumption of capacitive sensor nodes. In the first part of this talk\, we propose several energy -efficient CDC architectures for low-energy sensor nodes. In the second part\, we study the matching properties of small integrated capacitors\, which are an integral component of energy-efficient CDCs. Despite conventional wisdom\, we experimentally illustrate that the mismatch of small capacitors can be directly measured\, and we report experimental mismatch measurements for sub-femtofarad integrated capacitors. We also correct the common misconception that lateral capacitors match better than vertical capacitors\, and we identify the conditions that make one implementation preferable. \nBio: Dr. Salama received his bachelor’s degree with honors from the Electronics and Communications Department at Cairo University in Egypt in 1997\, and his master’s and doctorate degrees from the Electrical Engineering Department at Stanford University in the United States\, in 2000 and 2005 respectively. He was an assistant professor at RPI between 2005 and 2008. He joined King Abdullah University of science and technology (KAUST) in January 2009 and was the electrical engineering founding program chair till August 2011. His work on CMOS sensors for molecular detection has been funded by the National Institutes of Health (NIH) and the Defense Advanced Research Projects Agency (DARPA)\, awarded the Stanford-Berkeley Innovators Challenge Award in biological sciences and was acquired by Lumina Inc in 2008. He is the cofounder of ultrawave labs\, a biomedical imaging company that was recently acquired. He is the co-author of 90 papers and 10 patents on low-power mixed-signal circuits for intelligent fully integrated sensors and non linear electronics specially memristor devices. He is a senior member of IEEE. \nView Details Here
URL:https://www.cecs.uci.edu/event/energy-efficient-capacitance-to-digital-converters-for-low-energy-sensor-nodes/
LOCATION:CA
CATEGORIES:Seminars at CECS
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