BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//CECS - ECPv6.18.4//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-ORIGINAL-URL:https://www.cecs.uci.edu
X-WR-CALDESC:Events for CECS
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20110313T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20111106T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20120311T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20121104T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20130310T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20131103T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20120612T150000
DTEND;TZID=America/Los_Angeles:20120612T160000
DTSTAMP:20231011T192031Z
CREATED:20231011T181235Z
LAST-MODIFIED:20231011T192031Z
UID:14254-1339513200-1339516800@www.cecs.uci.edu
SUMMARY:Architectural Modeling of Embedded Systems - Challenges and Opportunities
DESCRIPTION:Architectural Modeling of Embedded Systems – Challenges and Opportunities\n\n\n\n\nSpeaker\n\n\nDr. Achim Rettberg\nCarl von Osseitzky University Oldenburg\n\n\n\n\n\n\n\n\n\n\nCECS Host\n\n\nProfessor Rainer Doemer\n\n\n\n\n\n\n\n\n\n\nLocation\n\n\nEngineering Hall 3216\n\n\n\n\n\n\n\n\n\n\nDate & Time\n\n\nJune 12\, 2012\nColloquium begins at 2:00PM \n\n\n\n\n\n\n\n\n\n\nAbstract\n\n\nToday embedded system design has to cover the increasing complexity and has to fulfil requirements. With traditional design methods the time-to-market is to long. New design methods as model-based design offers the reduction of product development time\, but it requires a different development process. This talk will give an overview of model-based design and show the complexity designers have to cope with. The idea to realize the system based on a virtual platform will also be covered in the talk. The reference technology platform (RTP) proposed and developed at OFFIS Institute (Oldenburg\, Germany) will be presented. The RTP gives the designer an excellent overview of the system and allows requirement coverage and analysis.\n\n\n\n\n\n\n\n\n\n\nBiography\n\n\n\n \nACHIM RETTBERG was born in Einbeck\, Germany. He received his M.S. (Dipl.-Inform.) in computer science and economics in 1997 and his Ph. D. (Dr. rer. nat.) degree in 2006 from the University of Paderborn\, Germany\, where he studied computer science and economics. From 1992 until 1997 he was employed as a working student for the University of Paderborn and C-LAB. From 1997 until 2000 he worked at C-LAB in industrial projects together with dSPACE and Siemens. From 2001 until 2006 he worked as a Ph.D. student and researcher for the C-LAB in the field of embedded system design. Afterwards he worked from 2007 until 2008 as Post-Doc at C-LAB and managed EU-Projects. In 2008 he became professor of complex integrated systems/embedded systems at the Computer Science department at Carl von Ossietzky University Oldenburg. Prof. Rettberg is founder and General Chair of the International Embedded Systems Symposium (IESS). Furthermore\, he is active in several conference/workshop committees and reviewers for journals. Prof. Rettberg is author and co-author of several scientific books\, journal articles and conference papers. His general research interests are model-based design\, real-time systems and HW/SW architectures. He is chairman of the IFIP working group 10.2 for embedded systems.
URL:https://www.cecs.uci.edu/event/architectural-modeling-of-embedded-systems-challenges-and-opportunities/
LOCATION:CA
CATEGORIES:Seminars at CECS
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DTSTART;TZID=America/Los_Angeles:20120627T150000
DTEND;TZID=America/Los_Angeles:20120627T160000
DTSTAMP:20231011T181236Z
CREATED:20231011T181236Z
LAST-MODIFIED:20231011T181236Z
UID:14257-1340809200-1340812800@www.cecs.uci.edu
SUMMARY:Addressing Supply Chain Security with Split Manufacturing
DESCRIPTION:Addressing Supply Chain Security with Split Manufacturing\n\n\n\n\nSpeaker\n\n\nDr. Ted Huffmire\nNaval Postgraduate School\, Monterey\, California\n\n\n\n\n\n\n\n\n\n\n\n\nCECS Host\n\n\nProfessor Nikil Dutt\n\n\n\n\n\n\n\n\n\n\nLocation\n\n\nDBH 3011\n\n\n\n\n\n\n\n\n\n\nDate & Time\n\n\nJuly 27\, 2012\nSeminar begins at 11:00am\, Refreshment at 10:45am\n\n\n\n\n\n\n\n\n\n\nAbstract\n\n\nSecurity is an essential design goal in computer architecture\, and security is a concern throughout the entire lifecycle of a system. The process of designing hardware requires trusting intellectual property (IP) cores and computer-aided design (CAD) tools developed by third parties\, as well as the fabrication\, packaging\, assembly\, and delivery of the final system. Valuable IP is vulnerable to theft and modification during tape-out\, even if a perfect design free of security flaws is sent to the foundry. Of course\, no design is ever perfect\, and having a trusted foundry does not solve the problem of flawed designs. Furthermore\, the trusted foundry may not have the capability to deliver the most aggressive technology node\, volume\, yield\, or cost. Even the extraordinary step of building everything from scratch in-house\, including all of the tool chains\, both digital and analog\, is not guaranteed to result in a trustworthy design.  \nThis short\, informal\, seminar-style talk will explore three split manufacturing approaches for addressing hardware supply chain security: reconfigurable hardware\, 2D IC split manufacturing\, and 3D IC split manufacturing. Reconfigurable hardware allows the design to be loaded onto a field-programmable gate array (FPGA) device in a secure facility after fabrication. With 2D IC split manufacturing\, different metal layers of the same wafer are fabricated in different foundries\, one of which is a trusted foundry. With 3D IC split manufacturing\, two or more individual die are fabricated in different foundries\, one of which is a trusted foundry\, and then assembled in a trusted facility. The challenges and opportunities of each of these approaches will be compared and contrasted\, as well as the viability of split manufacturing in general.\n\n\n\n\n\n\n\n\n\n\nBiography\n\n\n\n \nTed Huffmire is an Assistant Professor of Computer Science at the Naval Postgraduate School in Monterey\, California. His research spans both computer security and computer architecture\, focusing on hardware-oriented security and the development of policy enforcement mechanisms for application-specific devices. He has a Ph.D. in computer science from the University of California\, Santa Barbara. He is a member of the IEEE and the ACM. The views presented in this talk are those of the speaker and do not necessarily reflect the views of the United States Department of Defense
URL:https://www.cecs.uci.edu/event/addressing-supply-chain-security-with-split-manufacturing/
LOCATION:CA
CATEGORIES:Seminars at CECS
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