Speaker: Miquel Moreto
Date and Time: Wednesday, August 10, 11:00 am
Location: DBH 3011 OR Zoom Link
Abstract:
Designing RISC-V-based Accelerators for next-generation Computers (DRAC) is a 3-year project (2019-2022) funded by the ERDF Operational Program of Catalonia 2014-2020. DRAC will design, verify, implement and fabricate a high-performance general purpose processor that will incorporate different accelerators based on the RISC-V technology, with specific applications in the field of post-quantum security, genomics, and autonomous navigation.