In this project we study basic models of computations and communications for embedded systems and have developed a minimal and orthogonal set of properties necessary to specify and model embedded systems on different levels of abstractions. This has resulted in a new SpecC language for the specification of embedded systems which is a front-end for the popular language C. We have released SpecC compiler and its simulator in December of 1998. For download see SpecC web page.

Lead Researchers:

• Rainer Dömer
• Jianwen Zhu

• Daniel D. Gajski, Rainer Dömer, Jianwen Zhu, "IP-centric Methodology and Design with the SpecC Language," Chapter 10 in System-Level Synthesis, Proceedings of the NATO ASI on System Level Sythesis for Electronic Design, Il Ciocco, Lucca, Italy, Aug. 1998, edited by Ahmed A. Jerraya, Jean P. Mermet, Kluwer Academic Publishers, Dordrecht, ISBN 0-7923-5749-3, May 1999.
• Daniel D. Gajski, Jianwen Zhu, Rainer Dömer, "Essential Issues in Codesign," Chapter 1 in Hardware/Software Co-Design: Principles and Practice edited by Jørgen Staunstrup and Wayne Wolf, Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-8013-4, October 1997.
• Jianwen Zhu, Rainer Dömer and Daniel D. Gajski, "Syntax and Semantics of the SpecC Language," Proceedings of the Synthesis and System Integration of Mixed Technologies 1997, Osaka, Japan, December 1997.
• Rainer Dömer, Jianwen Zhu, and Daniel D. Gajski, "The SpecC Language Reference Manual," University of California, Irvine, Technical Report ICS-TR-98-13, January 1998.

This project deals with techniques for profiling and estimation of software and hardware metrics such as performance, cost, power, and manufacturability. We also study techniques for design space exploration that allows selections of the best system architecture, software and hardware organization, and controller and datapath designs. This project will result in fast search and optimization tools to select the best components, IPs, and software algorithms for a given embedded system specification.

Lead Researchers:

• Andreas Gerstlauer
  
• Shuqing Zhao

• Daniel D. Gajski, Jianwen Zhu, Rainer Dömer, "Essential Issues in Codesign," Chapter 1 in Hardware/Software Co-Design: Principles and Practice edited by Jørgen Staunstrup and Wayne Wolf, Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-8013-4, October 1997.
• Andreas Gerstlauer, Shuqing Zhao, Daniel D. Gajski and Arkady M. Horak, "Design of a GSM Vocoder using SpecC Methodology," UC Irvine, Technical Report ICS-TR-99-11, March 1999.

In this project we study the methods and techniques for synthesis of communication interfaces between software and hardware ports of embedded systems. We are also developing the tools for automatic conversion of architectural models that do not include communication details into communication models that include cycle accurate communication protocols. Such models are used for accurate performance predictions during architectural exploration of embedded systems.

Lead Researchers:

• Shuqing Zhao
  
• Jon Kleinsmith

• Daniel D. Gajski, Jianwen Zhu, Rainer Dömer, "Essential Issues in Codesign," Chapter 1 in Hardware/Software Co-Design: Principles and Practice edited by Jørgen Staunstrup and Wayne Wolf Kluwer Academic Publishers, Boston, MA, ISBN 0-7923-8013-4, October 1997.
• Jon Kleinsmith, Jianwen Zhu and Daniel D. Gajski, "ATM Modeling Example for SpecGen Evaluation," UC Irvine, Technical Report ICS-TR-97-47, October 1997.
• Jon Kleinsmith and Daniel D. Gajski, "Communication Synthesis for Reuse," UC Irvine, Technical Report ICS-TR-98-06, February 1998.

In this project we study basic algorithms for embedded systems such as software/hardware partitioning, scheduling, pipelining and synthesis. The main focus is to develop CAD tools that will automatically map specifications and requirements into a system architecture consisting of processors, memories, ASIC, and a variety of IPs.

Lead Researchers:

• Vincent Chang

• En-Shou Chang and Daniel D. Gajski, "System-Level Timing-constrained Scheduling," University of California, Irvine, Technical Report ICS-TR-98-15, January 1998.
• En-Shou Chang and Daniel D. Gajski, "SpecC System-level Static Scheduling," UC Irvine, Technical Report ICS-TR-99-23, May 1999.

This project deals with graphical capture of specifications and requirements for embedded systems. It also studies the interactive synthesis of embedded systems through designer familiar graphical objects as block diagrams, connectivity tables, hierarchy trees, histograms, object-oriented displays, and component and algorithm databases. The present goal is to develop a graphical capture for SpecC and interactive GUI for the SpecC environment.

Lead Researchers:

• Dai Araki
  
• Tadatoshi Ishii

Telecommunications systems are communication intensive instead of computation intensive. In this project we study a methodology for capturing communication intensive systems partitioning this description into user defined ASICs using hardware estimators to evaluate the result after inserting proper interfaces. This project will evaluate some commercial tools for their suitability in the design of telecommunications systems and propose extensions if necessary.

Lead Researchers:

• Anand Selka

• Jon Kleinsmith, Jianwen Zhu and Daniel D. Gajski, "ATM Modeling Example for SpecGen Evaluation," UC Irvine, Technical Report ICS-TR-97-47, October 1997.

In this project we address synthesis of SW and HW ports of embedded systems. We have started to with developing and unifying model for software compilation and behavioral synthesis. We are developing algorithms for scheduling and simulation of instruction set processors and behavioral descriptions for custom hardware.

Lead Researchers:

• Jianwen Zhu

• Jianwen Zhu and Daniel D. Gajski, "Soft Scheduling in High Level Synthesi," Proceedings of Design Automation Conferenc, New Orleans, USA, June, 1999.
• Jianwen Zhu and Daniel D. Gajski, "A Unified Formal Model for ISA and FSMD," 7th International Workshop on Hardware/Software Codesign, Rome, Italy, May, 1999.
• Jianwen Zhu and Daniel D. Gajski, "A Retargetable, Ultra-fast Instruction Set Simulator," Proceedings of Design Automation and Test Conference in Europe, Munich, Germany, March, 1999.
• Jianwen Zhu and Daniel D. Gajski, "OpenJ: An Extensible System Level Design Language," Proceedings of Design Automation and Test Conference in Europe, Munich, Germany, March, 1999.