Chapter 1. Introduction

Figure 1-1. Embedded System Environment.

The Embedded System Environment(ESE) is shown in Figure 1-1. The input to ESE front-end is the system definition consisting of a platform and application code. A library of processing elements, buses, bridges and RTOS is provided in ESE to develop such a platform. The retargetable timing estimation tool in ESE is used to annotate timing to the application code based on the mapping of application code on the platform components. The timed application and platform are input to the Transaction Level Model (TLM) generator tool that uses the bus and bridge models to generate a SystemC TLM. This SystemC TLM can be simulated by any commercial or freely available SystemC simulator to provide the performance metrics. The designer can use the metrics to optimize (i) the application code, (ii) the platform, and/or (iii) the mapping from the application to the platform. Since timing estimation and high-speed TLM generation in ESE are extremely fast, TLMs can be generated and simulated in minutes. This allows fast and early exploration of various design options with ESE.

The ESE provides an environment for modeling, estimation and validation. It includes a graphical user interface (GUI) and a set of tools to facilitate the design flow and perform the aforementioned optimization steps. The two major components of the GUI are the Design Decision Interface (DDI) and the Validation User Interface (VUI). The DDI allows designers to make and input design decisions, such as allocation of HW and SW components in the platform, and the mapping of application to the platform. With design decisions made, TLM generation and estimation tools can be invoked to generate functional and timed TLMs. The VUI allows the simulation of all TLMs using the OSCI SystemC simulator to validate the design at each stage of the design flow.

With the assistance of the GUI and automatic TLM generation tools, it is relatively easy for designer to step through the design process. With the editing, browsing and algorithm selection capability provided by the GUI, the C application processes can be efficiently captured by designers. Communication channels between the application processes can be created using an intuitive channel wizard. The HW platform can be allocated easily by simple drag-drop of components from the database. The processing elements(PEs), bridges and buses can be connected using ports. The mapping of the procesess to PEs and channels to buses/routes can also be done easily in the GUI. The TLM generation tools can be used to verify both the functional correctness of the design and to accurately estimate the performance. Various statistics are generated automatically by the tied TLM simulation. These statistics can be viewed graphically using the GUI.