Following a successful timed TLM simulation, users can access and analyze the estimated performance of the created design at the transaction level of communication. The total cycles for the system simulation is shown in the output terminal, and it is also recorden in the file {project_name}.cyc. The performance of PEs, CEs and bus components in the design model can be reviewed by right-clicking on the component of interest in the Design Canvas and selecting the View Graph... option.
PE Performance Analysis graph is accessed with right-clicking on that PE in the Design Canvas and selecting View Graph... option. This action pops-up a pie chart of the selected PE's performance, divided into the categories of idle time, Real-Time Operating System (RTOS) overhead time, time spent on communication and time spent on computation (idle, RTOS, comm, comp, respectively). The PE performance pie chart is shown in Figure 4-28. By clicking on the computation slice, another pie chart is shown (see Figure 4-29). It displays the processes slice in the PE computation time. By further clicking on a process, the user can see the different functions which compose the process (see Figure 4-30). The pie chart can be customized by accessing Main::Customize menu. The available options in viewing the performance graph are as follows:
No Explode is a default option for viewing a pie chart, which differentiates the seperate slices of the pie by color alone. Users can emphasize the separation between pie slices by selecting Medium or Heavy Explode, which, in addition to use of color, injects extra space between pie slices.
PE's performance in terms of idle time and times spent on communication and computation can be quantified with a ratio, their absolute values (in clock cycles), percentage values or with their respective idle/comm/comp labels.
The pie chart window is closed by selecting Main::Window->Close menu.
Bus Performance Analysis graph is accessed with right-clicking on the desired bus in the Design Canvas and selecting View Graph... option. This action pops-up a pie chart of the selected bus' performance, divided into the categories of idle time, time spent on fetching instruction/data (if the Program/Data is stored in the external memory) and time spent on transferring messages between processes (idle, Program/Data, data transfer, respectively). The bus performance pie chart is shown in Figure 4-31. By clicking on the Data Transfer slice, the breakdown of the data transfer by channels is shown (see Figure 4-32). The pie chart can be customized by accessing Main::Customize menu. The available options in viewing the performance graph are as follows:
No Explode is a default option for viewing a pie chart, which differentiates the seperate slices of the pie by color alone. Users can emphasize the separation between pie slices by selecting Medium or Heavy Explode, which, in addition to use of color, injects extra space between pie slices.
The bus performance in terms of idle time and times spent on fetching program instructions/data and data transfer can be quantified with a ratio, their absolute values (in clock cycles), percentage values or with their respective labels.
The pie chart window is closed by selecting Main::Window->Close menu.
CE Performance Analysis graph is accessed with right-clicking on the desired CE in the Design Canvas and selecting View Graph... option. This action pops-up a pie chart of the selected CE's performance, divided into the categories of time spent checking for process requests and time spent on storing and forwarding messages to and from the internal FIFO (fifo_check and fifo_read_write, respectively). The pie chart can be customized by accessing Main::Customize menu. The available options in viewing the performance graph are as follows:
No Explode is a default option for viewing a pie chart, which differentiates the seperate slices of the pie by color alone. Users can emphasize the separation between pie slices by selecting Medium or Heavy Explode, which, in addition to use of color, injects extra space between pie slices.
The bus performance in terms of times spent on checking the internal FIFO and reading from and writing into the FIFO can be quantified with a ratio, their absolute values (in clock cycles), percentage values or with their respective labels.
The pie chart window is closed by selecting Main::Window->Close menu.