Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions

P. Mishra and N.D. Dutt, “Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions,” Design and Analysis of Distributed Embedded Systems, Bernd Kleinjohann et al., Editors, Kluwer Academic Publishers, 2002, pp. 81-90.