Technical Reports

Minyoung Kim, Mark-Oliver Stehr, Carolyn Talcott, Kyoungwoo Lee, Nikil Dutt, Nalini Venkatasubramanian, "Iterative System Tuning for Proactive Systems by Formal Verification and System Prototype: System Prototype Program Interface", TR 07-02, January 2007. Complete TR is available upon request

 

Lochi Yu, Samar Abdi, Daniel Gajski, "Transaction Level Platform Modeling in SystemC for Multi-Processor Designs", TR 07-01 January 2007 download pdf

 

Lochi Yu, Samar Abdi, Daniel Gajski, “Transaction Level Platform Modeling in SystemC for Multi-Processor Designs,”TR 06-15, January 2007. download pdf

 

A. Gerstlauer, G. Schirner, D. Shin, and J. Peng, “Necessary and Sufficient Functionality and Parameters for SoC Communication,” TR 06-01, May 2006. Complete TR is available upon request.  

 

R. Doemer, “Transaction Level Modeling of Computation,” TR 06-11, August 2006. download pdf

 

A. Gerstlauer, G. Schirner, D. Shin, J. Peng, R. Doemer, D. Gajski, “System-On-Chip Component Models,” TR 06-10, May 2006. Complete TR is available upon request.

 

R. Cornea, A. Nicolau, N. Dutt, “Stream Annotations for Energy Trade-offs in a Video Decoder for Multimedia Applications,”TR 06-09, May 2006. download pdf

 

E. Johnson, A. Gerstlauer, R. Doemer, “Efficient Debugging and Tracing of System Level Designs,” TR 06-08, May 2006. download pdf/span>

 

S. Abdi, D. Gajski, “UBC: A Universal Bus Channel for Transaction level Modeling,” TR 06-07, April 2006. Complete TR is available upon request.  

 

G. Schirner, G. Sachdeva, A. Gerstalauer, R. Doemer, “Modeling, Simulation and Synthesis in an Embedded Software Design Flow for an ARM Processor,”TR 06-06, April 2006. download pdf

 

B. Gorjiara, M. Reshadi, D. Gajski, “NISC Double-Handshake Communication Interface,” TR 06-05, March 2006. download pdf

 

P. Biswas, S. Banerjee, and N. Dutt, “Processor Customization on a Xilinx Multimedia Board,” TR 06-04, March 2006. download pdf

 

S. Banerjee, E. Bozorgzadeh, N. Dutt, “Selecting Granularity of Parallelism for Tasks executing on Dynamically Reconfigurable Architectures,” TR 06-14, December 2006. download pdf

 

S. Pasricha and N. Dutt, “A Framework for Memory and Communication Architecture Co-synthesis in MPSoCs,”TR 06-03, February 2006. download pdf

 

R. Cornea, A. Nicolau, N. Dutt, “Content-aware Power Optimizations for Multimedia Streaming Over Wireless Networks ,” TR 06-13, November 2006. Complete TR is available upon request.