Technical Reports

L. Cai and D Gajski, "Specification Tuning of System-Level Design,” TR 02-20, June 6, 2002. download pdf

 

P. Zhang, D. D. Gajski, “RTL Design and Synthesis of Sequential Matrix Multiplication,” TR 02-09, April 3, 2002. download pdf

 

S. Gupta, N. Dutt, R. Gupta, A. Nicolau, “Coordinated Parallelizing Compiler Optimizations and High-Level Synthesis,” TR 02-35, December 2002. download pdf

 

P. Mishra, M. Mamidipaka, N. Dutt, “A Framework for Memory Subsystem Exploration,” TR 02-19, May 24, 2002. download pdf