Technical Reports

M. Luthra, S. Gupta, N. Dutt. R. Gupta, A. Nicolau, "Interface Synthesis using Memory Mapping for an FPGA Platform," TR 03-20, June 25, 2003. download pdf

 

B. Gorjiara, F. Kuester, P. Chou, and M. Reshadi, "GX-GUI: A General Extensible Technique for 2-D Interaction with VR Applications," TR 03-46, January 2003. download pdf

 

D. D. Gajski, A. Tripathi, and S. Verma, "G.729E Algorithm Optimization for ARM926EJ-S Processor," TR 03-09, March 21, 2003. download pdf

 

S. Abdi and D. Gajski, "System Debugging and Verification: A New Challenge," TR 03-31, October 1, 2003 download pdf

 
 

L. Cai, A. Gerstlauer, S. Abdi, J. Peng, D. Shin, H. Yu, R. Doemer, D. Gajski, "System-on-Chip Environment (SCE Version 2.2.0 Beta): Manual," TR 03-45, December 2003. download pdf

D. Shin, A. Gerstlauer, R. Doemer, and D. Gajski, "C-based Interactive RTL Design Methodology," TR 03-42, December 1, 2003. download pdf

 

D. D. Gajski and S. Abdi, "Automatic Communication Refinement for System Level Design," TR 03-08, March 7, 2003. download pdf

 

A. Gerstlauer, "Communication Abstractions for System-Level Design and Synthesis," TR 03-30, October 24, 2003. download pdf

 
 

S. Abdi, J. Peng, H. Yu, D. Shin, A. Gerstlauer, R. Doemer, and D. Gajski, "System-on-Chip Environment: SCE Version 2.2.0 Beta Tutorial," TR 03-41, December 2003. download pdf

 

R. Gupta, R. Jejurikar, and C. Periera, "Dual-Mode Frequency Inheritance Algorithm for Energy Aware Task Scheduling with Task Synchronization," TR 03-07, February 28, 2003. download pdf

 

S. Abdi and D. Gajski, "Provably Correct Architecture Refinement," TR 03-29, September 30, 2003. download pdf

 
 

D. D. Gajski, “System-Level Design Flow: What is needed and what is not," TR 02-33, November 26, 2002. download pdf

 

A. Gerstlauer, D. D. Gajski, “System-Level Abstraction Semantics,” TR 02-17, July 12, 2002. download pdf