Technical Reports

N. Dutt, M. Reshadi, P. Mishra, N. Bansal, "ReXsim: A Retargetable Framework for Instruction-Set Architecture Simulation," TR 03-05, February 10, 2003. download pdf


N. Bansal, S. Gupta, N. Dutt, A. N, and R. Gupta, "Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures," TR03-27, August 2003. download pdf


C. Pereira, S. Gupta, K. Niyogi, I. Lazaridis, S. Mehrotra, and R. Gupta, “Energy Efficient Communication for Reliability and Quality Aware Sensor Networks,” TR 03-15, April 21, 2003. download pdf


A. Kejariwal, S. Gupta, A. Nicolau, N. Dutt, and R. Gupta, "Energy Analysis of Multimedia Watermarking on Mobile Handheld Devices," TR 03-38, November 2003. download pdf


N. Dutt, A. Kejariwal, P. Mishra, J. Astrom, "HDLGen: Architecture Description Language driven HDL Generation for Pipelined Processors," TR 03-04, February 3, 2003. download pdf


A. Gerstlauer, L.Cai, D. Shin, R. Doemer, and D. Gajski, "System-On-Chip Component Models," TR 03-26, August 11, 2003. Complete TR is available upon request


S. Gupta, N. Dutt, R. Gupta, and A. Nicolau, "Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow," TR 03-14, April 2003. download pdf


A. Nacul, S. Choudhuri, and T. Givargis, “POSIX-Compliant Portable Code Synthesis for Embedded Systems,” TR 03-36, November 25, 2003. download pdf


D. D. Gajski and L. Cai, "Channel Mapping in System Level Design," TR 03-03, January 7, 2003. download pdf


P. Mishra, N. Dutt and H. Tomiyama, "Architecture Description Language driven Validation of Dynamic Behavior in Pipelined Processor Specifications," TR 03-25, July 28, 2003. download pdf


D. D. Gajski and K. Ramineni, "C to SpecC Conversion Style," TR 03-13, April 4, 2003. download pdf


R. Jejurikar, C. Pereira, and R. Gupta, "Leakage Aware Dynamic Voltage Scaling for Real Time Embedded Systems," TR 03-35, November 30, 2003. download pdf


D. D. Gajski, J. Peng, A. Gerstlauer, H. Yu, and D. Shin, "System Design Methodology and Tools," TR 03-02, January 12, 2003. download pdf


S. Pasricha and A. Veidenbaum, "Novel Techniques to Improve Branch Prediction Accuracy for Embedded Processors in the Presence of Context Switches," TR 03-24, August 2003. download pdf


D. D. Gajski, H. Yu, and A. Gerstlauer, "RTOS Scheduling in Transaction Level Models," TR 03-12, March 20, 2003. download pdf