Technical Reports

G. Sachdeva, R.Doemer, and P. Chou, "System Modeling: A Case Study on A Wireless Sensor Network," TR 05-12, June 2005. download pdf

 

M. Kim, H. Oh, N. Dutt, A. Nicolau, and N. Venkatasubramanian, "PBPAIR: Probability Based Power Aware Intra Refresh, A New Energy-efficient Error-resilient Encoding Scheme," TR 05-01, February 2005. download pdf

 

M. Reshadi, B. Gorjiara, and D. Gajski, "NISC Technology and Preliminary Results," TR 05-11, August 2005. download pdf

 

D. Shin, A. Gerstlauer, and D. Gajski, “Communication Link Synthesis for SoC,” TR 04-16, June 10, 2004. download pdf

 

P. Mishra and N. Dutt, "Functional Coverage Driven Test Generation for Validation of Pipelined Processors," TR 04-05, March 12, 2004. download pdf

 

S. Pasricha, N. Dutt, E. Bozorgzadeh, and M. Ben-Romdhane, "Floorplan-aware Bus Architecture Synthesis," TR 04-27, October 2004. download pdf

 

D. Shin, A. Gerstlauer, and D. Gajski, "Network Synthesis for SoC," TR 04-15, June 10, 2004. download pdf

 

L. Cai, A. Gerstlauer, and D. Gajski, "Retargetable Profiling for Rapid, Early System-Level Design Space Exploration," TR 04-04, February 2004. download pdf

 

B. Gorjiara and N. Bagherzadeh, "Systematic Power Management of Heterogeneous Real-time Systems by Dynamic Schedule Analysis," TR 04-26, August 2004. download pdf

 

R. Jejurikar and R. Gupta, "Systemwide Energy Minimization in Real-Time Embedded Systems," TR 04-14, May 2004. download pdf

 

R. Jejurikar and R. Gupta, "Integrating Processor Slowdown and Preemption Threshold Scheduling for Energy Efficiency in Real Time Embedded Systems," TR 04-03, February 16, 2004. download pdf

 

D. Shin, A. Gerstlauer, R. Doemer, D. Gajski, "System-on-Chip Communication Modeling Style Guide," TR 04-25, July 2004. download pdf

 

I. G. Harris, "On the Detection of Synchronization Errors," TR 04-13, May 2004. download pdf

 

J. Trajkovic and A. Veidenbaum, "Reducing SDRAM Energy Consumption in Embedded Systems," TR 04-02, October 2004. download pdf

 

D. Shin, L. Cai, A. Gerstlauer, R. Doemer, D. Gajski, "System-on-Chip Transaction-Level Modeling Style Guide," TR 04-24, July 2004. download pdf