Seminars by CECS

Code Layout Optimization for Remote Progressive Code Update for Networked Embedded Systems

by Jinsik Kim, University of California, Irvine May 19, 2010read more »

 
Low-Complexity and High-Throughput Protocols for Wireless Sensor Networks

by Chongjing Chen, University of California, Irvine November 18, 2009 read more »

 
Algorithmic Code Optimization Using Conditional Expression Evaluation

by Mohammad Ali Ghodrat, University of California, Irvine September 1, 2009read more »

 
Transducer Synthesis for Heterogeneous Multi-processor Systems

by Hansu Cho, University of California, Irvine July 9, 2009read more »

 
Automatic Generation and Verification of Transaction Level Models

by Lochi Yu, University of California, Irvine June 18, 2009read more »

 
TransMutations: A framework for dynamic customization of retargetable compilers for embedded processors

by Ashok Halambi, University of California, Irvine June 3, 2009read more »

 
Temperature Aware VLSI Design for Reduced Power and Reliability Enhancement

by Aseem Gupta, University of California, Irvine May 29, 2009read more »

 
Model-based Analysis of Event-driven Distributed Real-time Embedded Systems

by Gabor Madl, University of California, Irvine May 27, 2009read more »

 
Automatic Design and Optimization of Application Specific Processors

by Jelena Trajkovic, University of California, Irvine February 27, 2009read more »

 
Improving Packet Latencies of Live Streams in Wired Networks

by Arijit Ghosh, University of California, Irvine July 9, 2008read more »

 
xTune: A Formal Methodology for Cross-layer Tuning of Mobile Real-time Embedded Systems

by Minyoung Kim, University of California, Irvine July 8, 2008read more »

 
A Runtime System for Memory-Constrained Distributed Embedded Systems

by Jiwon Hahn, University of California, Irvine June 16, 2008read more »

 
Source Re-coding to Create Parallel and Flexible MPSoC Models for Embedded System Design and Exploration

by Pramod Chandraiah, University of California, Irvine June 4, 2008read more »

 
COMMSYN: On-Chip Communication Architecture Synthesis for Multi-Processor Systems-on-Chip

by Sudeep Pasricha, University of California, Irvine May 12, 2008read more »

 
Analysis and Optimization of Transaction Level Models for Multi-Processor System-on-Chip Design

by Gunar Schirner, University of California, Irvine March 3, 2008read more »