Seminars at CECS

Flexible-Stretchable-Reconfigurable CMOS Electronics Through Hybrid Integration of Heterogeneous Materials for Wearable Interactive Electronic Systems

Speaker:  Prof. Muhammad Mustafa Hussain, King Abdullah University of Science and Technology (KAUST)

Title:  “Flexible-Stretchable-Reconfigurable CMOS Electronics Through Hybrid Integration of Heterogeneous Materials for Wearable Interactive Electronic Systems”

Date:  Tuesday, April 21, 2015

Time:  2:00 PM

Location:  Harut Barsamian Colloquia Room (Engineering Hall 2430)

Host:  Prof. Fadi Kurdahi

Abstract: Our research is focused on heterogeneous electronic materials and high-performance complementary metal oxide semiconductor (CMOS) based tunable shape-size-conformity wearable interactive electronics and systems for smart living (computation-communication-infotainment) through internet of everything and a sustainable future (healthcare-water-food-environment-security). For scientific exploration, we make collective use of the materials, processes and device architecture leveraging multidisciplinary tracks of material science, bioengineering, mechanical, environmental engineering and computer science. As engineering tool, we use CMOS technology extensively due to its industrial relevance, maturity and reliability for rapid tech transfer.
To bridge between the high-performance state-of-the-art electronics and emerging soft-materials based flexible-stretchable electronics. we have developed various generic batch processes using CMOS technologies to transform any already processed Integrated Circuitry (IC) or arrays of devices to be fabricated on virgin substrates (thin film based, examples include but not limited to: silicon, silicon germanium, indium phosphide, gallium arsenide, etc.) into flexible and stretchable one [ACS Nano 2014, pss-RRL 2014]. These processes are cost effective ($1.25/cm2), non-abrasive and retain high-performance, energy-efficiency, ultra-large-scale-integration density as obtained in today’s state-of-the-art electronics. Often the transformed fabrics (ultra-thin version of the bulk thin film substrates with pre-fabricated devices) are semi-transparent due to the presence of the process originated vertical channels. As per ITRS 2014 metrics, the processes are fully scalable down to 2 nm technology node. Using these techniques we have demonstrated high-κ/metal gate based planar and non-planar nano-scale (sub-20 nm) CMOS logic devices [Adv. Mater. 2014 (cover page), ACS Nano 2014, APL 2013, pss-RRL 2013 (cover pages), IEEE TED 2013, pss-RRL 2013, Sci. Rep. 2013, pss-RRL 2013], memory [Adv. Electronic Mater. 2015, Microelect. Engr. 2014], micro-scale thermoelectric generators [Small 2013 (frontispiece)], micro lithium ion batteries (150 μAh/cm2 normalized capacity), MEMS devices [MEMS 2014], smart thermal patch using copper stretched up to 800% [Adv. Healthcare Mater. 2015 (frontispiece)], mono-crystalline silicon stretched up to 1000% [APL 2014]. Variety of device demonstrations on wide range of inorganic thin films using this technique proves the efficiency and versatility of it. Our research greatly complements the $150M Flexible Hybrid Electronics Manufacturing Initiative (FHEMII) – recently introduced by the US Department of Defense: “Highly tailorable devices on flexible, stretchable substrates that combined thinned CMOS components with components that are added via printing process”.

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Reviving Processing-in-Memory for Large Data Workload on Existing Computer Architecture

Speaker:  Professor Sungjoo Yoo, Computing and Memory Architecture Lab, Seoul National University

Title:  Reviving Processing-in-Memory for LArge Data Workload on Existing Computer Architecture

Date:  Tuesday, July 14, 2015

Time:  11:00 AM

Location:  Donald Bren Hall 3011

Host:  Nikil Dutt

Abstract: Processing-in-memory (PIM) is rebounding from its unsuccessful attempts in 1990s due to two main reasons, recent advances in 3D stacking technologies and emerging large data workload.  In this talk, we present two of our recent works, PIM for large data workload and combining PIM with the existing computer architecture.
Graph data are becoming more and more popular in many areas such as machine learning, social network analysis, etc.  Graph computation is to process a query to the graph database, e.g., finding the most popular personality.  Graph computation is characterized by computation parallelism (per-vertex parallel computation) and significant random memory accesses (to neighbor vertices).  The conventional architecture is not well suited for this type of workload.  We present a programmable PIM accelerator for large-scale graph processing called Tesseract.  Tesseract is composed of (1) a new hardware architecture that fully utilizes the available memory bandwidth, (2) an efficient method of communication between different memory partitions, and (3) a programming interface that reflects and exploits the unique hardware design.  It also includes two hardware prefecthers specialized for memory access patterns of graph processing, which operate base on the hints provided by our programming model.
In order to make best use of PIM in more areas, it is required to integrate the PIM architectures with existing systems in a seamless manner.  The current PIM proposals lack due to two common characteristics: unconventional programming models for in-memory computation units (as programmable co-processors) and lack of ability to utilize large on-chip caches.  We propose a new PIM architecture that (1) does not change the existing sequential programming models and (2) automatically decides whether to execute PIM operations in memory or processors depending on the locality of data.  The key idea is to implement simple in-memory computation using compute-capable memory commands and use specialized instructions, which we call PIM-enabled instructions, to invoke in-memory computation.  This allows PIM operations to be interoperable with existing programming models, cache coherence protocols, and virtual memory mechanisms with no modification.

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Computational Neuroscience for Technology: Event-based Vision Sensors and Information Processing

Speaker:  Prof. Jörg Conradt

Title:  Computational Neuroscience for Technology: Event-based Vision Sensors and Information Processing

Date:  Tuesday, June 2, 2015

Time:  3:00 p.m.

Location:  Donald Bren Hall 4011

Host:  Jeff Krichmar and Nikil Dutt

Abstract:

In recent decades the field of Computer Vision has developed sophisticated algorithms for problems such as object tracking or motion extraction based on sequences of high-resolution camera images. Applying such algorithms in real-time robotics reveals an inherent problem: they typically require high data bandwidth and high processing power, which results in substantial computing machinery and/or delayed processing of data. As part of an optimized biological solution for vision, our brain developed retinal receptor cells that largely respond with asynchronous events (“neural spikes”) to temporal changes of brightness. Such encoding of visual information substantially reduces the amount of transmitted data and simultaneously increases temporal precision.

Recently “silicon retinas” have been developed as specialized vision sensors to provide such neuro-inspired vision input for technical systems. Visual information obtained from these sensors differs substantially from traditional sequences of images, which requires an “event-based” redesign of computer vision algorithms. This talk introduces the neuro-inspired vision sensors and presents event-based algorithms for applications such as real-time computation of optic flow and visual object tracking at high update rates on minimalistic computing hardware.

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Design Technologies for Embedded Multiprocessor Systems-on-Chip

Speaker:  Prof. Rainer Leupers

Title: Design Technologies for Embedded Multiprocessor Systems-on-Chip

Date: Thursday, April 9, 2015

Time: 11:00am

Location: Harut Barsamian Colloquia Room (Engineering Hall 2430)

Host: Mohammad Al Faruque

Abstract:

The trend towards Multicore and even Manycore architectures affects virtually all areas of computing today. Especially in the mobiles and consumer domains, an extremely high architectural efficiency (MIPS/Watt) is required. In order to manage the complexity of multi-billion transistor IC designs with dozens of heterogeneous processing engines, advanced Electronic System Level (ESL) tools are required. ESL can be roughly subdivided into four categories: architecture modeling and optimization, application SW mapping, simulation and verification, and efficient IP block design. After a general introduction to embedded MPSoC (Multiprocessor Systems-on-Chip) architectures and ESL technologies, this seminar talk will cover selected aspects from the above four domains, in particular ESL power estimation, embedded multicore SW development, fast virtual platforms, and application-specific processor design.

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Architectural Support for Security in Emerging Platforms

Speaker: Nael Abu-Ghazaleh

Title: Architectural Support for Security in Emerging Platforms

Date: Wednesday, March 4, 2015

Time: 10:00am

Location: Harut Barsamian Colloquia Room (Engineering Hall 2430)

Host: Fadi Kurdahi

Abstract:

Computer systems are facing a growing threat from increasingly motivated, organized and sophisticated attackers.  The problem is complicated by the rapid evolution that computing platforms are experiencing towards mobile and embedded devices, as well as many-core systems, distributed systems, virtualization and clouds.  These emerging platforms offer new system and use models and therefore are subject to new vulnerabilities and threat models.  This talk motivates the role that computer architecture must play in securing current and emerging systems.  I will define this role spanning three primary directions: (1) new security models for protecting not only systems but also applications; (2) architecture support for monitoring to improve resilience to attacks, but also to rapidly detect and contain successful attacks; and (3) Security for emerging architectures.  I will animate each of these directions with examples from our recent work.

 
Towards the Automatic Application and Verification of Countermeasures Against Physical Attacks

Speaker: Francesco Regazzoni

Title: Towards the Automatic Application and Verification of Countermeasures Against Physical Attacks

Date: Tuesday, March 3, 2015

Time: 2:00pm

Location: Donald Bren Hall 3011

Host: Nikil Dutt & Rosario Cammarota

Abstract:

Physical attacks exploit the physical weaknesses of cryptographic devices to reveal the secret information stored on them. Countermeasures against these attacks are often considered only in the later stages of the full design flow, and applied manually by designers with strong security expertise. This approach, however, negatively affects the robustness, the cost, and the production time of secure devices.

In view of this increasingly relevant problem, it is crucial to address the design challenges associated with the proliferation of physical attacks, developing a methodology to automate the design and the verification of secure embedded systems.

This talk focuses on one type of physical attacks, the differential power analysis (DPA), and presents the design and the implementation of the infrastructure needed to enable the automatic application and verification of DPA countermeasures.

 
Connected Context Computing for Smart IoT

Speaker: Jane Yung-jen Hsu

Title: Connected Context Computing for Smart IoT

Date: Tuesday, February 10, 2015

Time: 3:30pm

Location: Harut Barsamian Colloquia Room (Engineering Hall 2430)

Host: Professor Kwei-Jay Lin

Abstract:

We are witnessing the explosion of connected devices, or the so-called Internet of Things, in our everyday lives. This new trend has created new opportunities to monitor human activities and to configure environments for comfort, security, or energy savings. In the US, buildings account for roughly 40% of total energy usage, with major contributions from the cooling demands. While most people have no intention of wasting energy, they are often unaware of the energy footprint of their daily routines. Activity recognition is a key capability for a smart environment to offer timely services and intelligent interactions with people.

In this talk, I will introduce connected context computing and its significance in enabling our vision of smart IoT. In particular, I will share our experience on monitoring the Computer Science building on NTU campus to improve its air conditioning and space utilization. First, an agent-based HVAC service is designed to analyze cooling demands and wastes. Second, experiments on SweetFeedback are conducted to encourage energy-saving behaviors. Third, crowd sourcing cyber-physical agents are deployed to acquire status labels for activity recognition from people situated in the environment. Â Our experiments showed that context computing, predictive analytics, and proactive control are the fundamental building blocks for a smart IoT framework that can SCALE (Sense, Communicate, Analyze, Learn, Expect and Effect).

 

 
Design Automation of Things: Power Consumption Characterization, Modeling and Estimation of Electric Vehicles

Title: Design Automation of Things: Power Consumption Characterization, Modeling and Estimation of Electric Vehicles

Speaker:  Professor Naehyuck Chang

Date/Time:  Tuesday, February 10, 2015, 2:00pm to 3:00pm

Location:  Harut Barsamian Colloquia Room (EH 2430)

Host: Nikil Dutt

Abstract:

Rapid electric vehicle (EV) penetration gives a threatening challenge in electric energy generation. An 1,814 kg curb weight full electric vehicle driving 18,129 km/year consumes electricity energy equivalent to 74% of the total residential electricity use per person in the US. This implies that 27% more nationwide electricity generation is needed when 70% of passenger vehicles are replaced with EVs.

This talk introduces the first step toward systematic EV design-time and runtime optimization. We develop instantaneous power consumption modeling of an EV by the curb weights, speed, acceleration, road slope, passenger and cargo weights, motor capacity, and so on, as a battery discharge model. The model also considers the onboard charger, regenerative braking and so on, as a battery charge model. To insure model fidelity, we fabricate a lightweight custom EV, perform extensive measurement, and derive model coefficients using multivariable regression analysis. We estimate the EV instantaneous power consumption of a given speed and route profiles and verify the estimation fidelity with a real test run data. This talk will also cover the on-going project for the next version electric vehicle with four-wheel drive capability.

 

 
Inertial and Bio-potential-based Wearable Computers: Algorithms and Applications

Title: Inertial and Bio-potential-based Wearable Computers: Algorithms and Applications

Speaker:  Professor Roozbeh Jafari

Date/Time:  Thursday, February 12, 2015, 11:00am to 12:00pm

Location:  Donald Bren Hall 4011

Host: Eli Bozorgzadeh

Abstract:

Wearable computers bring to fruition many new opportunities to continuously monitor human body with sensors placed on body; whether they are intended to detect an early onset of a disease, assess human performance or determine the effectiveness of a treatment. In the past few years, the community has observed a large number of applications leveraging wearable computers. There are, however, a number of fundamental challenges that need to be addressed before realizing the true ubiquitous use of the wearable computing systems.

In the first half of the talk, we highlight several inertial-based wearable applications including systems capable of monitoring activities of daily living (ADLs) and home exercises for senior citizen. We focus on a class of signal processing algorithms that provide extreme robustness leveraging accelerometers and gyroscopes. We present our results on ADLs and highlight our efforts in line with data dissemination for the scientific community. In the second half of the presentation, we focus on dry-contact electroencephalography (EEG). We present our brain-computer interface (BCI) system developed for intensive care units leveraging dry-contact EEG. We outline several components of EEG systems and focus on skin-electrode contact noise.

We provide techniques for noise reduction including contact reconfiguration along with experimental verifications. We provide concluding remarks on the trends of wearable computing technology development and future directions.

 
Evaluating GALS Systems for System Integration-Outlook and Future Prospects

Speaker: Dr. Milos Krstic
Date: Friday May 17, 2013
Time: 2:00pm – 3:00pm
Location: Donald Bren Hall 4011

Host: Dr. Steffen Peter

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Models and Architectures for Heterogeneous System Design

Speaker: Prof. Andreas Gerstlauer, University of Texas, Austin
Title: Models and Architectures for Heterogeneous System Design
Date: Monday, May 6, 2013
Time: 11:00am – 12:00pm
Location: Harut Barsamian Colloquia Room (2430 Engineering Hall)

Host: Prof. Rainer Dömer

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Functionality, Performance, and Power Consumption Challenges in Smartphones

Speaker: Prof. Sung-Soo Lim, Kookmin University, South Korea
Title: Functionality, Performance, and Power Consumption Challenges in Smartphones
Date: Friday, April 12, 2013
Time: 11:00am – 12:00pm
Location: Donald Bren Hall 6011

Host: Prof. Eli Bozorgzadeh

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The Delft Reconfigurable VLIW Processor

Speaker: Prof. Stephan Wong, Computer Engineering Laboratory, Delft University of Technology, Netherlands
Title: The Delft Reconfigurable VLIW Processor
Date: Tuesday, March 26, 2013
Time: 2:00pm – 3:00pm
Location: 2111 Engineering Hall

Host: Prof. Fadi Kurdahi

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A Thermal Perspective of Dependability in Systems on Chip

Speaker: Prof. Jörg Henkel, Karlsruhe Institute of Technology, Germany
Location: Harut Barsamian Colloquia Room (EH 2430)
Date/Time: Monday, February 25, 2013, 11:00am to 12:00pm
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Cyber-Physical Systems at Small and Large Scales

Speaker:  Prof. Marilyn Wolf, Georgia Institute of Technology
Location: 
4011 Donal Bren Hall
Date/
Time: Friday, September 28, 3012, 2:00-3:00PM
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