949-824-9127
Loading Events

« All Events

  • This event has passed.

Bita Gorjiara Takes Hami and Best Paper Award

May 1, 2007 @ 10:00 pm PDT

Bita Gorjiara has won the prestigious Hami Award of Excellence in Engineering Education for the year 2007. Sponsored by the Fanni Reunion Foundation, the Hami award recognizes outstanding M.Sc. and Ph.D. graduates with a previous degree from University of Tehran. Each year, Hami award is given to one or two students with excellent academic record in terms of GPA, number of publications, and overall contribution in their field of study. Bita has also received the Best Student Paper Award for her journal paper, “Ultra-Fast and Efficient Algorithm for Energy Optimization by Gradient-based Stochastic Voltage and Task Scheduling,” which has also been accepted for publication in ACM Transactions on Design Automation of Electronic Systems (TODAES).
This paper award is an honor given by the EECS department for first-time authors. In her paper, co-authored by Professor Bagherzadeh and Professor Chou, Bita proposes an ultra-fast and voltage scheduling algorithm called Adaptive Stocahstic Gradient Voltage-and-Task Scheduling (ASG-VTS) that is used for power optimization of designs with voltage islands. This unique technique was shows to surpass the energy savings of previously published results while reducing number of voltage transitions. Compared to an optimal ILP algorithm, her technique converges 1000 times faster while generating results as good as the optimal solution. She has also developed a web-based tool for her algorithm that allows researchers to capture the model of their system and run ASG-VTS. Research groups use Bita’s tool for evaluating new algorithms, and some universities have used as part of their course curriculum.

Currently, and for the past three years, Bita has been working on No-Instruction-Set Computer (NISC) project under supervision of Prof. Gajski. She has developed an Architecture Description Language (ADL) for NISC called GNR that is used for automatic generation of RTL code. She has also proposed techniques to reduce power consumption and code size of NISCs while improving their performance via architecture customization.

Details

Date:
May 1, 2007
Time:
10:00 pm PDT
Event Category: