Research Interest

My research interests span widely across a range of topics in Electrical and Computer Engineering. They include, System level languages and modeling, Computer Architecture and Compilers.
My current research focuses on issues and the complexities involved in writing SoC specification.

Research Summary:

To overcome the complexities in today's System-on-Chip (SoC) design, researchers have developed sophisticated design environments that  significantly reduce design and development time through automation. Typically, a SoC design is specified in a system-level description language (SLDL) at a high abstraction level, called a specification model. This model is then step-wise refined down to an implementation with the help of automated (or semi-automated) synthesis tools.

While much research has focused on SoC synthesis tools, little has been done to support the designer in coming up with the initial specification model. In fact, studies on industrial-size examples (MP3 decoder, GSM vocoder ...) have shown that even in the presence of algorithms given in C code, 90% of the system design time is spent on coding and re-coding of the specification model in SLDL. Moreover, the quality of the golden specification model has tremendous impact on the cost and quality of the resulting system implementation. Thus, creating and optimizing the specification model is a critical task towards successful SoC design.

It is the goal of this research project to