Rainer Dömer: Publications

listed by publication date (list by type)

2008
2007
2006
2005
2004
2003
2002
2001
2000
1999
1998
1997
1996
1995
1994

T. Bohr, R. Dömer: "A Flexible Video Stream Converter", Center for Embedded Computer Systems, Technical Report 08-13, October 2008.
W. Ecker, W. Müller, R. Dömer: "Hardware-dependent Software - Principles and Practice", Springer, Boston, in print September 2008. (ISBN TBD)
W. Ecker, W. Müller, R. Dömer: "Hardware-dependent Software - Introduction and Overview", Chapter 1 in "Hardware-dependent Software: Principles and Practice" (ed. W. Ecker, W. Müller, R. Dömer), Springer, Boston, in print September 2008. (ISBN TBD)
G. Schirner, R. Dömer, A. Gerstlauer: "High-Level Development, Modeling and Automatic Generation of Hardware-dependent Software", Chapter 8 in "Hardware-dependent Software: Principles and Practice" (ed. W. Ecker, W. Müller, R. Dömer), Springer, Boston, in print September 2008. (ISBN TBD)
W. Chen, S. Sun, B. Zhang, R. Dömer: "System Level Modeling of a H.264 Decoder", Center for Embedded Computer Systems, Technical Report 08-10, August 2008.
R. Dömer, A. Gerstlauer, J. Peng, D. Shin, L. Cai, H. Yu, S. Abdi, D. Gajski: "System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design", EURASIP Journal on Embedded Systems, vol. 2008, article ID 647953, 13 pages, July 2008.
P. Chandraiah, R. Dömer: "Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 6, pp. 1078-1090, June 2008.
D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "An Interactive Design Environment for C-based High-level Synthesis of RTL Processors", IEEE Transactions on Very Large Scale Integration Systems, vol. 16, no. 4, pp. 466-475, April 2008.
G. Schirner, R. Dömer: "Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling", Proceedings of Design Automation and Test in Europe, Munich, Germany, March 2008.
S. Sun, R. Dömer: "A Convolutional Encoder and Decoder Model in SpecC", Center for Embedded Computer Systems, Technical Report 08-03, February 2008.
P. Chandraiah, R. Dömer: "Assessment of Productivity Gains Achieved through Automated Source Re-Coding", Center for Embedded Computer Systems, Technical Report 08-02, February 2008.
W. Chen, R. Dömer: "System Specification of a DES Cipher Chip", Center for Embedded Computer Systems, Technical Report 08-01, January 2008.
G. Schirner, A. Gerstlauer, R. Dömer: "Automatic Generation of Hardware dependent Software for MPSoCs from Abstract System Specifications", Proceedings of the Asia and South Pacific Design Automation Conference 2008, Seoul, Korea, January 2008.
P. Chandraiah, R. Dömer: "Automatic Re-coding of Reference Code into Structured and Analyzable SoC Models", Proceedings of the Asia and South Pacific Design Automation Conference 2008, Seoul, Korea, January 2008.

P. Chandraiah, R. Dömer: "Pointer Re-coding for Creating Definitive MPSoC Models", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, Salzburg, Austria, September 2007.
EECS Best Student Paper Award: G. Schirner, R. Dömer: "Result Oriented Modeling - A Novel Technique for Fast and Accurate TLM", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 9, pp. 1688-1699, Sept. 2007.
A. Gerstlauer, D. Shin, J. Peng, R. Dömer, D. Gajski: "Automatic Layer-Based Generation of System-On-Chip Bus Communication Models", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 9, pp. 1676-1687, Sept. 2007.
G. Schirner, R. Dömer: "Quantitative Analysis of the Speed/Accuracy Trade-off in Transaction Level Modeling", ACM Transactions on Embedded Computing Systems, accepted for publication, August 23, 2007.
D. Castellanos, R. Dömer: "System-Level Modeling and Simulation of an Elevator Control System", Center for Embedded Computer Systems, Technical Report 07-04, June 2007.
P. Chandraiah, R. Dömer: "Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification", Proceedings of the Design Automation Conference 2007, San Diego, California, June 2007.
A. Rettberg, M. Zanella, R. Dömer, A. Gerstlauer, F. Rammig: "Embedded System Design: Topics, Techniques and Trends", Springer, Boston, June 2007. (ISBN 978-0-387-72257-3)
G. Schirner, G. Sachdeva, A. Gerstlauer, R. Dömer: "Embedded Software Development in a System-level Design Flow", Proceedings of the International Embedded Systems Symposium, "Embedded System Design: Topics, Techniques and Trends" (ed. A. Rettberg, M. Zanella, R. Dömer, A. Gerstlauer, F. Rammig), Springer, Irvine, California, May 2007.
P. Chandraiah, R. Dömer: "An Interactive Model Re-Coder for Efficient SoC Specification", Proceedings of the International Embedded Systems Symposium, "Embedded System Design: Topics, Techniques and Trends" (ed. A. Rettberg, M. Zanella, R. Dömer, A. Gerstlauer, F. Rammig), Springer, Irvine, California, May 2007.
D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "An Interactive Design Environment For C-Based High-Level Synthesis", Proceedings of the International Embedded Systems Symposium, "Embedded System Design: Topics, Techniques and Trends" (ed. A. Rettberg, M. Zanella, R. Dömer, A. Gerstlauer, F. Rammig), Springer, Irvine, California, May 2007.
R. Dömer, D. Gajski: "System-level Synthesis from Transaction-level Models: Algorithms and Tools", Proceedings of the Design and Verification Conference 2007, San Jose, California, February 2007.
G. Schirner, A. Gerstlauer, R. Dömer: "Abstract, Multifaceted Modeling of Embedded Processors for System-Level Design", Proceedings of the Asia and South Pacific Design Automation Conference 2007, Yokohama, Japan, January 2007.
P. Chandraiah, J. Peng, R. Dömer: "Creating Explicit Communication in SoC Models Using Interactive Re-Coding", Proceedings of the Asia and South Pacific Design Automation Conference 2007, Yokohama, Japan, January 2007.

G. Schirner, R. Dömer: "Fast and Accurate Transaction Level Models using Result Oriented Modeling", Proceedings of the International Conference on Computer Aided Design, San Jose, California, November 2006.
R. Dömer, A. Gerstlauer, D. Shin: "Cycle-accurate RTL Modeling with Multi-Cycled and Pipelined Components", Proceedings of the International System-on-Chip Design Conference, Seoul, Korea, October 2006.
G. Schirner, R. Dömer: "Accurate yet Fast Modeling of Real-Time Communication", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, Seoul, Korea, October 2006.
D. Shin, A. Gerstlauer, J. Peng, R. Dömer, D. Gajski: "Automatic Generation of Transaction-Level Models for Rapid Design Space Exploration", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, Seoul, Korea, October 2006.
I. Viskic, R. Dömer: "A Flexible, Syntax Independent Representation (SIR) for System Level Design Models", Proceedings of EuroMicro Conference on Digital System Design, Dubrovnik, Croatia, August 2006.
R. Dömer: "Transaction Level Modeling of Computation", Center for Embedded Computer Systems, Technical Report 06-11, August 2006.
T. Schattkowsky, A. Rettberg, R. Dömer: "Design Space Exploration through Interactive Model Mappings for UML-based Specifications", Proceedings of DAC 2006 Workshop UML for SoC Design, San Francisco, California, July 2006.
A. Gerstlauer, G. Schirner, D. Shin, J. Peng, R. Dömer, D. Gajski: "System-on-Chip Component Models", Center for Embedded Computer Systems, Technical Report 06-10, May 2006.
E. Johnson, A. Gerstlauer, R. Dömer: "Efficient Debugging and Tracing of System Level Designs", Center for Embedded Computer Systems, Technical Report 06-08, May 2006.
G. Schirner, G. Sachdeva, A. Gerstlauer, R. Dömer: "Modeling, Simulation and Synthesis in an Embedded Software Design Flow for an ARM Processor", Center for Embedded Computer Systems, Technical Report 06-06, May 2006.
G. Schirner, R. Dömer: "Quantitative Analysis of Transaction Level Models for the AMBA Bus", Proceedings of Design Automation and Test in Europe, Munich, Germany, March 2006.

D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "Automatic Network Generation for System-on-Chip Communication Design", Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, Jersey City, New Jersey, September 2005.
IESS Best Paper Award: G. Schirner, R. Dömer: "Abstract Communication Modeling: A Case Study Using the CAN Automotive Bus", Proceedings of the International Embedded Systems Symposium, "From Specification to Embedded Systems Application" (ed. A. Rettberg, M. Zanella, F. Rammig), Springer, Manaus, Brazil, August 2005.
H. Yu, R. Dömer, D. Gajski: "Software and Driver Synthesis from Transaction Level Models", Proceedings of the International Embedded Systems Symposium, "From Specification to Embedded Systems Application" (ed. A. Rettberg, M. Zanella, F. Rammig), Springer, Manaus, Brazil, August 2005.
D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "Automatic Generation of Communication Architectures", Proceedings of the International Embedded Systems Symposium, "From Specification to Embedded Systems Application" (ed. A. Rettberg, M. Zanella, F. Rammig), Springer, Manaus, Brazil, August 2005.
G. Sachdeva, R. Dömer, P. Chou: "System Modeling: A Case Study on a Wireless Sensor Network", Center for Embedded Computer Systems, Technical Report 05-12, June 2005.
D. Gajski, A. Gerstlauer, R. Dömer, S. Abdi, J. Peng, D. Shin: "TL Environment", Center for Embedded Computer Systems, Technical Report 05-10, July 2005.
G. Schirner, R. Dömer: "Using Result Oriented Modeling for Fast Yet Accurate TLMs", Center for Embedded Computer Systems, Technical Report 05-05, May 2005.
P. Chandraiah, R. Dömer: "Specification and Design of a MP3 Audio Decoder", Center for Embedded Computer Systems, Technical Report 05-04, May 2005.
G. Schirner, R. Dömer: "System Level Modeling of an AMBA Bus", Center for Embedded Computer Systems, Technical Report 05-03, April 2005.
A. Gerstlauer, D. Shin, R. Dömer, D. Gajski: "System-Level Communication Modeling for Network-on-Chip Synthesis", Proceedings of the Asia and South Pacific Design Automation Conference 2005, Shanghai, China, January 2005.
R. Dömer: "The SpecC Internal Representation (V2.2.0)", Center for Embedded Computer Systems, Internal Technical Report, January 2005.

A. Gupta, R. Dömer: "System Design of Digital Camera Using SpecC", Center for Embedded Computer Systems, Technical Report 04-32, December 2004.
D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "System-on-Chip Communication Modeling Style Guide", Center for Embedded Computer Systems, Technical Report 04-25, July 2004.
D. Shin, L. Cai, A. Gerstlauer, R. Dömer, D. Gajski: "System-on-Chip Transaction-Level Modeling Style Guide", Center for Embedded Computer Systems, Technical Report 04-24, July 2004.
D. Shin, J. Peng, A. Gerstlauer, R. Dömer, D. Gajski: "System-on-Chip Network Modeling Style Guide", Center for Embedded Computer Systems, Technical Report 04-23, July 2004.
J. Peng, A. Gerstlauer, R. Dömer, D. Gajski: "System-on-Chip Architecture Modeling Style Guide", Center for Embedded Computer Systems, Technical Report 04-22, July 2004.
R. Dömer, A. Gerstlauer, D. Shin: "Cycle-accurate RTL Modeling with Multi-cycled and Pipelined Components", Center for Embedded Computer Systems, Technical Report 04-19, July 2004.
P. Chandraiah, H. Schirner, N. Srinivas, R. Dömer: "System-On Chip Modeling and Design: A Case Study on MP3 Decoder", Center for Embedded Computer Systems, Technical Report 04-17, June 2004.
H. Yu, R. Dömer, D. Gajski: "Embedded Software Generation from System Level Design Languages", Proceedings of the Asia and South Pacific Design Automation Conference 2004, Yokohama, Japan, January 2004.

L. Cai, A. Gerstlauer, S. Abdi, J. Peng, D. Shin, H. Yu, R. Dömer, D. Gajski: "System-On-Chip Environment (SCE Version 2.2.0 Beta): Manual", Center for Embedded Computer Systems, Technical Report 03-45, December 2003.
D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "C-based Interactive RTL Design Methodology", Center for Embedded Computer Systems, Technical Report 03-42, December 2003.
S. Abdi, J. Peng, H. Yu, D. Shin, A. Gerstlauer, R. Dömer, D. Gajski: "System-On-Chip Environment, SCE Version 2.2.0 Beta, Tutorial", Center for Embedded Computer Systems, Technical Report 03-41, July 2003.
A. Gerstlauer, L. Cai, D. Shin, R. Dömer, D. Gajski: "System-On-Chip Component Models", Center for Embedded Computer Systems, Technical Report 03-26, August 2003.
A. Gerstlauer, K. Ramineni, R. Dömer, D. Gajski: "System-On-Chip Specification Style Guide", Center for Embedded Computer Systems, Technical Report 03-21, June 2003.
H. Yu, R. Dömer, D. Gajski: "Automatic Software Generation for System Level Design", Center for Embedded Computer Systems, Technical Report 03-18, May 2003.

R. Dömer, A. Gerstlauer, D. Gajski: "SpecC Language Reference Manual, Version 2.0", SpecC Technology Open Consortium, Japan, December 2002.
W. Mueller, R. Dömer, A. Gerstlauer: "The Formal Execution Semantics of SpecC", Proceedings of the International Symposium on System Synthesis, Kyoto, Japan, October 2002.
S. Abdi, J. Peng, R. Dömer, D. Shin, A. Gerstlauer, A. Gluhak, L. Cai, Q. Xie, H. Yu, P. Zhang, D. Gajski: "System-on-Chip Environment (SCE) Tutorial", Center for Embedded Computer Systems, Technical Report 02-28, September 2002.
R. Dömer, D. Gajski, A. Gerstlauer: "SpecC Methodology for High-Level Modeling", 9th IEEE/DATC Electronic Design Processes Workshop, Monterey, California, April 2002.
R. Dömer: "The SpecC System-Level Design Language and Methodology, Part 1", Embedded Systems Conference 2002, San Francisco, California, March 2002.
R. Dömer, A. Gerstlauer, P. Kritzinger, M. Olivarez: "The SpecC System-Level Design Language and Methodology, Part 2", Embedded Systems Conference 2002, San Francisco, California, March 2002.
W. Mueller, R. Dömer, A. Gerstlauer: "The Formal Execution Semantics of SpecC", Center for Embedded Computer Systems, Technical Report 02-04, January 2002.

R. Dömer: "SpecC Reference Compiler SCRC 1.1, Software Architecture and Implementation", Center for Embedded Computer Systems, Internal Technical Report, September 2001.
A. Gerstlauer, R. Dömer, J. Peng, D. Gajski: "System Design: A Practical Guide with SpecC", Kluwer Academic Publishers, Boston, June 2001. (ISBN 0-7923-7387-1)
Japanese translation by T. Kinoshita: SpecC Technology Open Consortium, Japan, June 2001.
Chinese translation by J. Bian, H. Xue: Tsinghua University Press, China, January 2008. (ISBN 978-7-302-13289-9)
R. Dömer, A. Gerstlauer, D. Gajski: "SpecC Language Reference Manual, Version 1.0", SpecC Technology Open Consortium, Japan, March 2001.

R. Dömer: "System-level Modeling and Design with the SpecC Language", Dissertation, University of Dortmund, Germany, April 2000.
D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, S. Zhao: "SpecC: Specification Language and Methodology", Kluwer Academic Publishers, Boston, March 2000. (ISBN 0-7923-7822-9)
Japanese translation by T. Kinoshita: CQ Publishing, Japan, December 2000. (ISBN 4-7898-3353-4)
R. Dömer, D. Gajski: "Reuse and Protection of Intellectual Property in the SpecC System", Proceedings of the Asia and South Pacific Design Automation Conference 2000, Yokohama, Japan, January 2000.

D. Gajski, J. Zhu, R. Dömer, A. Gerstlauer, S. Zhao: "The SpecC Methodology", University of California, Irvine, Technical Report ICS-TR-99-56, December 1999.
D. Gajski, R. Dömer, J. Zhu: "IP-centric Methodology and Specification Language", Chapter in "Distributed and Parallel Embedded Systems" (ed. F. Rammig), Kluwer Academic Publishers, Boston, September 1999. (ISBN 0-7923-8614-0)
D. Gajski, R. Dömer, J. Zhu: "IP-Centric Methodology and Design with the SpecC Language", Chapter 10 in "System-Level Synthesis" (ed. A. Jerraya, J. Mermet), Kluwer Academic Publishers, Dordrecht, May 1999. (ISBN 0-7923-5748-5)
R. Dömer: "The SpecC Internal Representation (V2.0.3)", University of California, Irvine, Internal Technical Report, January 1999.

D. Gajski, R. Dömer, J. Zhu: "IP-centric Methodology and Design with the SpecC Language", NATO-ASI Workshop on System Level Synthesis for Electronic Design, Il Ciocco, Lucca, Italy, August 1998.
R. Dömer: "The SpecC Internal Representation (V2.0.1)", University of California, Irvine, Internal Technical Report, July 1998.
R. Dömer, D. Gajski, J. Zhu: "Specification and Design of Embedded Systems", In it+ti Magazine 3/98, Oldenbourg Verlag GmbH, Munich, Germany, June 1998.
D. Gajski, G. Aggarwal, E. Chang, R. Dömer, T. Ishii, J. Kleinsmith, J. Zhu: "IP-Centric Methodology", Proceedings of the 1st International Workshop on Design, Test and Applications, Dubrovnik, Croatia, June 1998.
R. Dömer, D. Gajski: "Comparison of the Scenic Design Environment and the SpecC System", University of California, Irvine, Internal Technical Report, May 1998.
R. Dömer, J. Zhu, D. Gajski: "The SpecC Language Reference Manual", University of California, Irvine, Technical Report ICS-TR-98-13, March 1998.
D. Gajski, G. Aggarwal, E. Chang, R. Dömer, T. Ishii, J. Kleinsmith, J. Zhu: "Methodology for Design of Embedded Systems", University of California, Irvine, Technical Report ICS-TR-98-07, March 1998.

J. Zhu, R. Dömer, D. Gajski: "Syntax and Semantics of the SpecC Language", Proceedings of the Workshop on Synthesis and System Integration of Mixed Technologies 1997, Osaka, Japan, December 1997.
D. Gajski, J. Zhu, R. Dömer: "Essential Issues in Codesign", Chapter 1 in "Hardware/Software Co-Design: Principles and Practice" (ed. J. Staunstrup, W. Wolf), Kluwer Academic Publishers, Boston, October 1997. (ISBN 0-7923-8013-4)
D. Gajski, J. Zhu, R. Dömer: "Essential Issues in Codesign", University of California, Irvine, Technical Report ICS-TR-97-26, June 1997.
J. Zhu, R. Dömer, D. Gajski: "Syntax and Semantics of the SpecC+ Language", University of California, Irvine, Technical Report ICS-TR-97-16, April 1997.
D. Gajski, J. Zhu, R. Dömer: "The SpecC+ Language", University of California, Irvine, Technical Report ICS-TR-97-15, April 1997.
B. Landwehr, P. Marwedel, I. Markhof, R. Dömer: "Exploiting Isomorphism for Speeding-Up Instance-Binding in an Integrated Scheduling, Allocation and Assignment Approach to Architectural Synthesis", Proceedings of the Conference on Computer Hardware Description Languages and their Applications, Toledo, Spain, April 1997.
P. Marwedel, B. Landwehr, R. Dömer: "Built-in Chaining: Introducing Complex Components into Architectural Synthesis", Proceedings of the Asia South Pacific Design Automation Conference 1997, Chiba, Japan, January 1997.

P. Marwedel, Birger Landwehr, R. Dömer: "Introducing Complex Components into Architectural Synthesis", University of Dortmund, Technical Report No. 611, April 1996.
P. Marwedel, S. Bashford, R. Dömer, B. Landwehr, I. Markhof: "A Technique for Avoiding Isomorphic Netlists in Architectural Synthesis", Proceedings of the European Design and Test Conference 1996, Paris, France, March 1996.

P. Marwedel, S. Bashford, R. Dömer, B. Landwehr, I. Markhof:
"A Technique for Avoiding Isomorphic Netlists in Architectural Synthesis",
University of California, Irvine, Technical Report ICS-TR-95-28, August 1995.

R. Dömer: "Optimale Mikroarchitektursynthese mittels Ganzzahliger Programmierung", Diploma Thesis, University of Dortmund, Germany, November 1994.
B. Landwehr, P. Marwedel, R. Dömer: "OSCAR: Optimum Simultaneous Scheduling, Allocation and Resource Binding Based on Integer Programming", Proceedings of the European Design Automation Conference 1994, Grenoble, France, September 1994.
B. Landwehr, P. Marwedel, R. Dömer: "OSCAR: Optimum Simultaneous Scheduling, Allocation and Resource Binding Based on Integer Programming", University of Dortmund, Technical Report No. 484, April 1994.

10/06/08 R. Doemer (doemer@uci.edu).